L128MH93N HTML VIEW PDF DOWNLOAD - Advanced Micro Devices

L128MH93N View Datasheet(PDF) - Advanced Micro Devices

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L128MH93N

128 Megabit (8 M x 16-Bit/16 M x 8-Bit) MirrorBit™ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O™ Control

Advanced Micro Devices

L128MH93N Datasheet PDF : 66 Pages

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DATA SHEET

GENERAL DESCRIPTION

The Am29LV128MH/L is a 128 Mbit, 3.0 volt single

power supply flash memory devices organized as

8,388,608 words or 16,777,216 bytes. The device has

a 16-bit wide data bus that can also function as an

8-bit wide data bus by using the BYTE# input. The de-

vice can be programmed either in the host system or

in standard EPROM programmers.

An access time of 90, 100, 110, or 120 ns is available.

Note that each access time has a specific operating

voltage range (VCC) and an I/O voltage range (VIO), as

specified in “Product Selector Guide” on page 6 and

the “Ordering Information” on page 10. The device is

offered in a 56-pin TSOP, 64-ball Fortified BGA. Each

device has separate chip enable (CE#), write enable

(WE#) and output enable (OE#) controls.

Each device requires only a single 3.0 volt power

supply for both read and write functions. In addition to

a VCC input, a high-voltage accelerated program

(WP#/ACC) input provides shorter programming times

through increased current. This feature is intended to

facilitate factory throughput during system production,

but may also be used in the field if desired.

The device is entirely command set compatible with

the JEDEC single-power-supply Flash standard.

Commands are written to the device using standard

microprocessor write timing. Write cycles also inter-

nally latch addresses and data needed for the pro-

gramming and erase operations.

The sector erase architecture allows memory sec-

tors to be erased and reprogrammed without affecting

the data contents of other sectors. The device is fully

erased when shipped from the factory.

Device programming and erasure are initiated through

command sequences. Once a program or erase oper-

ation has begun, the host system need only poll the

DQ7 (Data# Polling) or DQ6 (toggle) status bits or

monitor the Ready/Busy# (RY/BY#) output to deter-

mine whether the operation is complete. To facilitate

programming, an Unlock Bypass mode reduces com-

mand sequence overhead by requiring only two write

cycles to program data instead of four.

The VersatileI/O™ (VIO) control allows the host sys-

tem to set the voltage levels that the device generates

and tolerates on the CE# control input and DQ I/Os to

the same voltage level that is asserted on the VIO pin.

Refer to the Ordering Information section for valid VIO

options.

Hardware data protection measures include a low

VCC detector that automatically inhibits write opera-

tions during power transitions. The hardware sector

group protection feature disables both program and

erase operations in any combination of sector groups

of memory. This can be achieved in-system or via pro-

gramming equipment.

The Erase Suspend/Erase Resume feature allows

the host system to pause an erase operation in a given

sector to read or program any other sector and then

complete the erase operation. The Program Sus-

pend/Program Resume feature enables the host sys-

tem to pause a program operation in a given sector to

read any other sector and then complete the program

operation.

The hardware RESET# pin terminates any operation

in progress and resets the device, after which it is then

ready for a new operation. The RESET# pin may be

tied to the system reset circuitry. A system reset would

thus also reset the device, enabling the host system to

read boot-up firmware from the Flash memory device.

The device reduces power consumption in the

standby mode when it detects specific voltage levels

on CE# and RESET#, or when addresses have been

stable for a specified period of time.

The Secured Silicon Sector provides a

128-word/256-byte area for code or data that can be

permanently protected. Once this sector is protected,

no further changes within the sector can occur.

The Write Protect (WP#/ACC) feature protects the

first or last sector by asserting a logic low on the WP#

pin.

AMD MirrorBit flash technology combines years of

Flash memory manufacturing experience to produce

the highest levels of quality, reliability and cost effec-

tiveness. The device electrically erases all bits within a

sector simultaneously via hot-hole assisted erase. The

data is programmed using hot electron injection.