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ADV7342 View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADV7342 Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs ADI
Analog Devices ADI
ADV7342 Datasheet PDF : 88 Pages
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ADV7342/ADV7343
TIMING DIAGRAMS
The following abbreviations are used in Figure 2 to Figure 13:
t9 = Clock high time
t10 = Clock low time
t11 = Data setup time
t12 = Data hold time
CLKIN_A
t9 t10
t12
CONTROL S_HSYNC,
INPUTS S_VSYNC
t13 = Control output access time
t14 = Control output hold time
In addition, refer to Table 31 for the ADV7342/ADV7343 input
configuration.
IN SLAVE MODE
S7 TO S0/
Y7 TO Y0*
Cb0
Y0
Cr0
Y1
Cb2
Y2
Cr2
t11
t13
CONTROL
OUTPUTS
t14
IN MASTER/SLAVE MODE
*SELECTED BY SUBADDRESS 0x01, BIT 7.
Figure 2. SD Only, 8-Bit, 4:2:2 YCrCb Pixel Input Mode (Input Mode 000)
CLKIN_A
CONTROL S_HSYNC,
INPUTS S_VSYNC
S7 TO S0/
Y7 TO Y0*
t9 t10
Y0
t12
Y1
Y2
Y3
Y7 TO Y0/
C7 TO C0*
Cb0
Cr0
Cb2
Cr2
t11
t13
CONTROL
OUTPUTS
t14
*SELECTED BY SUBADDRESS 0x01, BIT 7.
Figure 3. SD Only, 16-Bit, 4:2:2 YCrCb Pixel Input Mode (Input Mode 000)
IN SLAVE MODE
IN MASTER/SLAVE MODE
CLKIN_A
t9 t10
t12
CONTROL S_HSYNC,
INPUTS S_VSYNC
Y7 TO Y0
G0
G1
G2
C7 TO C0
B0
B1
B2
t11
S7 TO S0
R0
R1
R2
CONTROL
OUTPUTS
t14
t13
Figure 4. SD Only, 24-Bit, 4:4:4 RGB Pixel Input Mode (Input Mode 000)
Rev. 0 | Page 10 of 88
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