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ADV7321KSTZ View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADV7321KSTZ Multiformat 216 MHz Video Encoder with Six NSV® 12-Bit DACs ADI
Analog Devices ADI
ADV7321KSTZ Datasheet PDF : 88 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADV7320/ADV7321
TABLE OF CONTENTS
Specifications..................................................................................... 6
Dynamic Specifications ................................................................... 7
Timing Specifications....................................................................... 8
Timing Diagrams.............................................................................. 9
Absolute Maximum Ratings.......................................................... 16
Thermal Characteristics ............................................................ 16
ESD Caution................................................................................ 16
Pin Configuration and Function Descriptions........................... 17
Typical Performance Characteristics ........................................... 19
MPU Port Description................................................................... 23
Register Access................................................................................ 25
Register Programming............................................................... 25
Subaddress Register (SR7 to SR0) ............................................ 25
Input Configuration ....................................................................... 38
Standard Definition Only.......................................................... 38
Progressive Scan Only or HDTV Only ................................... 38
Simultaneous Standard Definition and
Progressive Scan or HDTV ....................................................... 38
Progressive Scan at 27 MHz (Dual Edge) or 54 MHz ........... 39
Features ............................................................................................ 41
Output Configuration................................................................ 41
HD Async Timing Mode........................................................... 42
HD Timing Reset........................................................................ 43
SD Real-Time Control, Subcarrier Reset, and
Timing Reset ............................................................................... 43
Reset Sequence............................................................................ 45
SD VCR FF/RW Sync................................................................. 45
Vertical Blanking Interval ......................................................... 46
Subcarrier Frequency Registers ................................................ 46
Square Pixel Timing Mode........................................................ 47
Filters............................................................................................ 48
Color Controls and RGB Matrix .............................................. 49
Programmable DAC Gain Control .......................................... 53
Gamma Correction .................................................................... 53
HD Sharpness Filter and Adaptive Filter Controls................ 55
HD Sharpness Filter and Adaptive Filter
Application Examples ................................................................ 56
SD Digital Noise Reduction...................................................... 57
Coring Gain Border ................................................................... 58
Coring Gain Data ....................................................................... 58
DNR Threshold .......................................................................... 58
Border Area................................................................................. 58
Block Size Control...................................................................... 58
DNR Input Select Control......................................................... 58
DNR Mode Control ................................................................... 59
Block Offset Control .................................................................. 59
SD Active Video Edge................................................................ 59
SAV/EAV Step Edge Control .................................................... 59
HSYNC/VSYNC Output Control ............................................ 61
Board Design and Layout.............................................................. 62
DAC Termination and Layout Considerations ...................... 62
Video Output Buffer and Optional Output Filter.................. 62
PCB Board Layout...................................................................... 63
Appendix 1—Copy Generation Management System .............. 65
PS CGMS..................................................................................... 65
HD CGMS................................................................................... 65
SD CGMS .................................................................................... 65
Function of CGMS Bits ............................................................. 65
CGMS Functionality.................................................................. 65
Appendix 2—SD Wide Screen Signaling .................................... 68
Appendix 3—SD Closed Captioning ........................................... 69
Appendix 4—Test Patterns............................................................ 70
Appendix 5—SD Timing Modes .................................................. 73
Rev. 0 | Page 2 of 88
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