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ADV7310 View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADV7310 Multiformat 216 MHz Video Encoder with Six NSV? 12-Bit DACs ADI
Analog Devices ADI
ADV7310 Datasheet PDF : 84 Pages
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ADV7310/ADV7311
WRITE
SEQUENCE
S
SLAVE ADDR
A(S)
SUBADDR
A(S)
LSB = 0
DATA
A(S)
LSB = 1
DATA
A(S) P
READ
SEQUENCE
S SLAVE ADDR A(S) SUBADDR A(S) S SLAVE ADDR A(S)
DATA
A(M)
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A(S) = NO-ACKNOWLEDGE BY SLAVE
A(M) = NO-ACKNOWLEDGE BY MASTER
Figure 20. Read and Write Sequence
DATA
A(M) P
REGISTER ACCESSES
The MPU can write to or read from all of the registers of the
ADV7310/ADV7311 except the subaddress registers, which are
write only registers. The subaddress register determines which
register the next read or write operation accesses. All communi-
cations with the part through the bus start with an access to the
subaddress register. A read/write operation is then performed
from/to the target address, which increments to the next address
until a stop command is performed on the bus.
Register Programming
The following tables describe the functionality of each register.
All registers can be read from as well as written to, unless other-
wise stated.
Subaddress Register (SR7–SR0)
The communications register is an 8-bit write only register. After
the part has been accessed over the bus and a read/write opera-
tion is selected, the subaddress is set up. The subaddress register
determines to/from which register the operation takes place.
REV. A
–17–
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