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ADV7180WBCPZ-REEL 10-Bit, 4× Oversampling SDTV Video Decoder ADI
Analog Devices ADI
ADV7180WBCPZ-REEL Datasheet PDF : 120 Pages
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Data Sheet
ADV7180
OUTPUT
VIDEO
FIELD 1
622
623 624
625
1
2
3
4
5
6
7
8
9
10 11
23 24
HS
OUTPUT
VS
OUTPUT
FIELD
OUTPUT
OUTPUT
VIDEO
PVBEG[4:0] = 0x01 PVEND[4:0] = 0x04
FIELD 2
PFTOG[4:0] = 0x06
310 311
312
313 314 315
316 317
318 319
320 321 322 323
336
337
HS
OUTPUT
VS
OUTPUT
FIELD
OUTPUT
PVBEG[4:0] = 0x01
PVEND[4:0] = 0x04
PFTOG[4:0] = 0x06
Figure 42. PAL Typical VS/FIELD Positions Using the Register Writes Shown in Table 66
Table 66. User Settings for PAL (See Figure 42)
Register
Register Name
Write
0x31
VS/FIELD Control 1
0x1A
0x32
VS/FIELD Control 2
0x81
0x33
VS/FIELD Control 3
0x84
0x34
HS Position Control 1
0x00
0x35
HS Position Control 2
0x00
0x36
HS Position Control 3
0x7D
0x37
Polarity
0xA1
0xE8
PAL V bit begin
0x41
0xE9
PAL V bit end
0x84
0xEA
PAL F bit toggle
0x06
PVBEGDELO, PAL VSYNC Begin Delay on Odd Field,
Address 0xE8[7]
When PVBEGDELO is 0 (default), there is no delay.
Setting PVBEGDELO to 1 delays VSYNC going high on an odd
field by a line relative to PVBEG.
PVBEGDELE, PAL VSYNC Begin Delay on Even Field,
Address 0xE8[6]
PVBEG[4:0], PAL VSYNC Begin, Address 0xE8[4:0]
The default value of PVBEG is 00101, indicating the PAL VSYNC
begin position. For all NTSC/PAL VSYNC timing controls, the
V bit in the AV code and the VSYNC signal on the VS pin are
modified.
1
PVBEGSIGN
0
ADVANCE BEGIN OF
VSYNC BY PVBEG[4:0]
DELAY BEGIN OF
VSYNC BY PVBEG[4:0]
NOT VALID FOR USER
PROGRAMMING
ODD FIELD?
YES
NO
PVBEGDELO
1
0
ADDITIONAL
DELAY BY
1 LINE
PVBEGDELE
0
1
ADDITIONAL
DELAY BY
1 LINE
When PVBEGDELE is 0, there is no delay.
Setting PVBEGDELE to 1 (default) delays VSYNC going high
on an even field by a line relative to PVBEG.
VSBHO
1
0
VSBHE
0
1
PVBEGSIGN, PAL VSYNC Begin Sign, Address 0xE8[5]
Setting PVBEGSIGN to 0 delays the beginning of VSYNC. Set
for user manual programming.
ADVANCE BY
0.5 LINE
ADVANCE BY
0.5 LINE
Setting PVBEGSIGN to 1 (default) advances the beginning of
VSYNC (not recommended for user programming).
VSYNC BEGIN
Figure 43. PAL VSYNC Begin
Rev. G | Page 51 of 120
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