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ADV7180BCPZ View Datasheet(PDF) - Analog Devices

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ADV7180BCPZ Datasheet PDF : 120 Pages
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ADV7180
Data Sheet
PF, Polarity FIELD, Address 0x37[3]
The polarity of the FIELD pin for the 64-lead LQFP part can be
inverted using the PF bit.
The FIELD pin can be inverted using the PF bit.
When PF is 0 (default), FIELD is active high.
When PF is 1, FIELD is active low.
Table 65. User Settings for NTSC (See Figure 37)
Register
Register Name
Write
0x31
VS/FIELD Control 1
0x1A
0x32
VS/FIELD Control 2
0x81
0x33
VS/FIELD Control 3
0x84
0x34
HS Position Control 1
0x00
0x35
HS Position Control 2
0x00
0x36
HS Position Control 3
0x7D
0x37
Polarity
0xA1
0xE5
NTSV V bit begin
0x41
0xE6
NTSC V bit end
0x84
0xE7
NTSC F bit toggle
0x06
OUTPUT
VIDEO
H
FIELD 1
525
1
2
3
4
5
6
7
8
9
10 11 12 13
19
20
21
22
V
F
OUTPUT
VIDEO
H
NVBEG[4:0] = 0x05
NVEND[4:0] = 0x04
1BT.656-4
REG 0x04, BIT 7 = 1
NFTOG[4:0] = 0x03
FIELD 2
262
263 264 265 266 267 268 269 270
271 272 273 274 275 276
283
284 285
V
NVBEG[4:0] = 0x05
NVEND[4:0] = 0x04
1BT.656-4
REG 0x04, BIT 7 = 1
F
NFTOG[4:0] = 0x03
1APPLIES IF NEWAVMODE = 0:
MUST BE MANUALLY SHIFTED IF NEWAVMODE = 1.
Figure 36. NTSC Default, ITU-R BT.656 (the Polarity of H, V, and F is Embedded in the Data)
FIELD 1
OUTPUT
VIDEO
525
1
2
3
4
5
6
7
8
9
10 11 12
13 14
15
21
22
HS
OUTPUT
VS
OUTPUT
FIELD
OUTPUT
NVBEG[4:0] = 0x01 NVEND[4:0] = 0x04
NFTOG[4:0] = 0x06
OUTPUT
VIDEO
HS
OUTPUT
VS
OUTPUT
FIELD
OUTPUT
FIELD 2
262
263 264 265 266 267 268 269 270
271 272 273 274 275 276 277
NVBEG[4:0] = 0x01 NVEND[4:0] = 0x04
NFTOG[4:0] = 0x06
Figure 37. NTSC Typical VSYNC/FIELD Positions Using the Register Writes in Table 65
284 285
Rev. G | Page 48 of 120
 

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