ADV7172KST View Datasheet(PDF) - Analog Devices

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ADV7172KST

Digital PAL/NTSC Video Encoder with Six DACs (10 Bits), Color Control and Enhanced Power Management

Analog Devices 

ADV7172/ADV7173

MODE REGISTER 0 MR0 (MR07–MR00)

(Address (SR4–SR0) = 00H)

Figure 44 shows the various operations under the control of

Mode Register 0.

MR0 BIT DESCRIPTION

Output Video Standard Selection (MR01–MR00)

These bits are used to set up the encoder mode. The ADV7172/

ADV7173 can be set up to output NTSC, PAL (B, D, G, H, I),

PAL M or PAL N standard video.

Luma Filter Select (MR02–MR04)

These bits specify which luma filter is to be selected. The

filter selection is made independent of whether PAL or

NTSC is selected.

Chroma Filter Select (MR05–MR07)

These bits select the chroma filter. A low-pass filter can be

selected with a choice of cutoff frequencies (0.65 MHz, 1.0 MHz,

1.3 MHz, or 2 MHz), along with a choice of CIF or QCIF filters.

MODE REGISTER 1 MR1 (MR17–MR10)

(Address (SR4–SR0) = 01H)

Figure 45 shows the various operations under the control of

Mode Register 1.

MR1 BIT DESCRIPTION

DAC Control (MR15–MR10)

MR15–MR10 bits can be used to power down the DACs. This

can be used to reduce the power consumption of the ADV7172/

ADV7173 if any of the DACs are not required in the application.

Low Power Mode Control (MR16)

This bit enables the lower power mode of the ADV7172/

ADV7173. This will reduce by approximately 50% the average

supply current consumed by each large DAC which is powered

on. For each DAC in low power mode, the relationship between

RSET1/VREF and the output current is unchanged by this (see

Appendix 8). This bit is only relevant to the larger DACs,

DACs A, B, and C. DACs D, E, and F are not affected by this

low power mode.

Reserved (MR17)

A Logic “0” must be written to this bit.

MR07

MR06

MR05

MR04

MR03

MR02

MR01

MR00

CHROMA FILTER SELECT

MR07 MR06 MR05

0 0 0 1.3MHz LOW-PASS FILTER

0 0 1 0.65MHz LOW-PASS FILTER

0 1 0 1.0MHz LOW-PASS FILTER

0 1 1 2.0MHz LOW-PASS FILTER

1 0 0 RESERVED

1 0 1 CIF

1 1 0 QCIF

1 1 1 RESERVED

OUTPUT VIDEO

STANDARD SELECTION

MR01 MR00

0 0 NTSC

0 1 PAL (B, D, G, H, I)

1 0 PAL (M)

1 1 PAL (N)

LUMA FILTER SELECT

MR04 MR03 MR02

0 0 0 LOW-PASS FILTER (NTSC)

0 0 1 LOW-PASS FILTER (PAL)

0 1 0 NOTCH FILTER (NTSC)

0 0 1 NOTCH FILTER (PAL)

1 0 0 EXTENDED MODE

1 0 1 CIF

1 1 0 QCIF

1 1 1 RESERVED

Figure 44. Mode Register 0 (MR0)

MR17

MR16

MR15

MR14

MR13

MR12

MR11

MR10

LOW POWER MODE

CONTROL

MR16

0 DISABLE

1 ENABLE

DAC B

DAC C CONTROL

MR14

0 POWER-DOWN

1 NORMAL

DAC D

DAC C CONTROL

MR12

0 POWER-DOWN

1 NORMAL

DAC F

DAC C CONTROL

MR10

0 POWER-DOWN

1 NORMAL

MR17

ZERO SHOULD BE

WRITTEN TO

THIS BIT

DAC A

DAC C CONTROL

MR15

0 POWER-DOWN

1 NORMAL

DAC C

DAC C CONTROL

MR13

0 POWER-DOWN

1 NORMAL

DAC E

DAC C CONTROL

MR11

0 POWER-DOWN

1 NORMAL

Figure 45. Mode Register 1 (MR1)

REV. B

–27–

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