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ADV7171KSUZ View Datasheet(PDF) - Analog Devices

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ADV7171KSUZ Datasheet PDF : 64 Pages
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ADV7170/ADV7171
Mode 0 (CCIR-656): Master Option
(Timing Register 0 TR0 = X X X X X 0 0 1)
The ADV7170/ADV7171 generate H, V, and F signals required for the SAV (start active video) and EAV (end active video) time codes
in the CCIR656 standard. The H bit is output on the HSYNC pin, the V bit is output on the BLANK pin, and the F bit is output on the
FIELD/VSYNC pin. Mode 0 is illustrated in Figure 21 (NTSC) and Figure 22 (PAL). The H, V, and F transitions relative to the video
waveform are illustrated in Figure 23.
DISPLAY
VERTICAL BLANK
DISPLAY
522 523 524 525
1
H
2
3
4
5
6
7
8
9
10
11
V
F
DISPLAY
EVEN FIELD ODD FIELD
VERTICAL BLANK
20
21
22
DISPLAY
260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
H
V
F
ODD FIELD EVEN FIELD
Figure 21. Timing Mode 0 (NTSC Master Mode)
283 284 285
Rev. C | Page 20 of 64
 

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