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ADV7170KSZ-REEL View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADV7170KSZ-REEL Digital PAL/NTSC Video Encoder with 10-Bit SSAF? and Advanced Power Management ADI
Analog Devices ADI
ADV7170KSZ-REEL Datasheet PDF : 64 Pages
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GENERAL DESCRIPTION
The ADV7170/ADV7171 are integrated digital video encoders
that convert digital CCIR-601 4:2:2 8- or 16-bit component
video data into a standard analog baseband television signal
compatible with worldwide standards.
The on-board SSAF (super sub-alias filter) with extended
luminance frequency response and sharp stop band attenuation
enables studio-quality video playback on modern TVs, giving
optimal horizontal line resolution.
An advanced power management circuit enables optimal
control of power consumption in both normal operating modes
and power-down or sleep modes.
The ADV7170/ADV7171 support both PAL and NTSC square
pixel operation. The parts also incorporate WSS and CGMS-A
data control generation.
The output video frames are synchronized with the incoming
data timing reference codes. Optionally, the encoder accepts
and can generate HSYNC, VSYNC, and FIELD timing signals.
These timing signals can be adjusted to change pulse width and
position while the part is in the master mode. The encoder
requires a single, two-times pixel rate (27 MHz) clock for
standard operation. Alternatively, the encoder requires a
24.5454 MHz clock for NTSC or 29.5 MHz clock for PAL
square pixel mode operation. All internal timing is generated
on-chip.
A separate teletext port enables the user to directly input teletext
data during the vertical blanking interval.
The ADV7170/ADV7171 modes are set up over a 2-wire, serial
bidirectional port (I2C-compatible) with two slave addresses.
Functionally, the ADV7170 and ADV7171 are the same with the
exception that the ADV7170 can output the Macrovision
anticopy algorithm.
The ADV7170/ADV7171 are packaged in a 44-lead MQFP
package and a 44-lead TQFP package.
ADV7170/ADV7171
DATA PATH DESCRIPTION
For PAL B/D/G/H/I/M/N, and NTSC M and N modes, YcrCb
4:2:2 data is input via the CCIR-656 compatible pixel port at a
27 MHz data rate. The pixel data is demultiplexed to form three
data paths. Y typically has a range of 16 to 235; Cr and Cb
typically have a range of 128 ± 112. However, it is possible to
input data from 1 to 254 on Y, Cb, and Cr. The ADV7170/
ADV7171 support PAL (B, D, G, H, I, M, N) and NTSC (with
and without pedestal) standards. The appropriate SYNC,
BLANK, and burst levels are added to the YCrCb data.
Macrovision antitaping (ADV7170 only), closed-captioning,
and teletext levels are also added to Y, and the resultant data
is interpolated to a rate of 27 MHz. The interpolated data is
filtered and scaled by three digital FIR filters.
The U and V signals are modulated by the appropriate sub-
carrier sine/cosine phases and added together to make up the
chrominance signal. The luma (Y) signal can be delayed 1 to
3 luma cycles (each cycle is 74 ns) with respect to the chroma
signal. The luma and chroma signals are then added together to
make up the composite video signal. All edges are slew rate
limited.
The YCrCb data is also used to generate RGB data with
appropriate SYNC and BLANK levels. The RGB data is in
synchronization with the composite video output. Alternatively,
analog YUV data can be generated instead of RGB.
The four 10-bit DACs can be used to output the following:
Composite video + RGB video.
Composite video + YUV video.
Two composite video signals + LUMA
and CHROMA (Y/C) signals.
Alternatively, each DAC can be individually powered off if not
required.
Video output levels are illustrated in Appendix 6—Waveforms.
Rev. C | Page 13 of 64
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