ADV7150LS170 View Datasheet(PDF) - Analog Devices
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ADV7150LS170 Datasheet PDF : 36 Pages
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ADV7150
APPENDIX 5
INITIALIZATION AND PROGRAMMING
ADV7150 Initialization
After power has been supplied, the ADV7150 must be initial-
ized. The Mode Register and Control Registers must be set.
The values written to the various registers will be determined by
the desired operating mode of the part, i.e., True Color/Pseudo
Color, 2:1 Muxing/2:1 Muxing, etc.
The following section gives examples of initialization of the
ADV7150 operating in various modes.
Example 1
Color Mode
Multiplexing
Databus
RAM-DAC Resolution
SYNC
Pedestal
24-Bit True Color
2:1
8-Bit
8-Bit
Enabled on IOG
7.5 IRE
Register Initialization
Write 09H to Mode Register (MR1)
Write 08H to Mode Register (MR1)
Write 09H to Mode Register (MR1)
Write 29H to Mode Register (MR1)
Write 09H to Mode Register (MR1)
Write 04H to Address Register (A7–A0)
Write FFH to Pixel Mask Register
Write 05H to Address Register (A7–A0)
Write 00H to Command Reg 1 (CR1)
Write 06H to Address Register (A7–A0)
Write ECH to Command Reg 2 (CR2)
Write 07H to Address Register (A7–A0)
Write C0H to Command Reg 3 (CR3)
C1 C0
11
11
11
11
11
00
10
00
10
00
10
00
10
R/W Comment
0
Resets to Normal Operation, 8-Bit Bus/RAM-DAC
0
*(Initializes Pipelining
0
*( “
0
*(Calibrates LOADOUT/LOADIN Timing
0
*( “
0
Address Reg Points to Pixel Mask Register
0
Sets the Pixel Mask to All “1s”
0
Address Reg Points to Command Register 1 (CR1)
0
0
Address Reg Points to Command Register 2 (CR2)
0
Sets 24-Bit Color, 7.5 IRE, SYNC on Green (IOG)
0
Address Reg Points to Command Register 3 (CR3)
0
Sets 2:1 Multiplexing, PRGCKOUT = CLOCK/4
Color Palette RAM Initialization
C1 C0
Write 00H to Address Register (A7–A0)
00
Write 00H (Red Data) to RAM Location (00H)
01
Write 00H (Green Data) to RAM Location (00H) 0 1
Write 00H (Blue Data) to RAM Location (00H)
01
Write 01H (Red Data) to RAM Location (01H)
01
Write 01H (Green Data) to RAM Location (01H) 0 1
Write 01H (Blue Data) to RAM Location (01H)
01
•
•
•
•
•
••
•
•
•
•
•
••
Write FFH (Red Data) to RAM Location (FFH) 0 1
Write FFH (Green Data) to RAM Location (FFH) 0 1
Write FFH (Blue Data) to RAM Location (FFH) 0 1
R/W Comment
0
Points to Color Palette RAM
0
(Initializes Palette RAM
0
( to a Linear Ramp**
0
(
0
(
0
(
0
(
•
(
•
(
0
(
0
(
0
(RAM Initialization Complete
**These four command lines reset the ADV7150. The pipelines for each of the Red, Creen and Blue pixel inputs are synchronously reset to the Multiplexer’s
“A” input. Mode Register bit MR10 is written by a “1” followed by “0” followed by “1.” LOADIN/LOADOUT timing is internally synchronized by writing a “0”
followed by a “1” followed by a “0” to Mode Register MR15.
**This sequence of instructions would, of course, normally be coded using some form of loop instruction.
–30–
REV. A
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