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ADV7125BCPZ170 View Datasheet(PDF) - Analog Devices

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ADV7125BCPZ170 Datasheet PDF : 16 Pages
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ADV7125
3.3 V ELECTRICAL CHARACTERISTICS
VAA = 3.0 V to 3.6 V, VREF = 1.235 V, RSET = 560 Ω, CL = 10 pF. All specifications TMIN to TMAX,1 unless otherwise noted, TJ MAX = 110°C.
Table 2.
Parameter2
STATIC PERFORMANCE
Resolution (Each DAC)
Integral Nonlinearity (BSL)
Differential Nonlinearity
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current, IIN
PSAVE Pull-Up Current
Input Capacitance, CIN
ANALOG OUTPUTS
Output Current
DAC-to-DAC Matching
Output Compliance Range, VOC
Output Impedance, ROUT
Output Capacitance, COUT
Offset Error
Gain Error3
VOLTAGE REFERENCE, EXTERNAL
Reference Range, VREF
VOLTAGE REFERENCE, INTERNAL
Voltage Reference, VREF
POWER DISSIPATION
Digital Supply Current4
Analog Supply Current
Standby Supply Current
Power Supply Rejection Ratio
Min Typ
Max Unit
Test Conditions1
8
Bits
−1 ±0.5 +1 LSB
−1
±0.25 +1
LSB
RSET = 680 Ω
RSET = 680 Ω
RSET = 680 Ω
2.0
0.8
−1
20
10
V
V
+1
μA
μA
pF
VIN = 0.0 V or VDD
2.0
2.0
1.0
0
70
10
0
0
26.5 mA
Green DAC, SYNC = high
18.5 mA
RGB DAC, SYNC = low
%
1.4 V
pF
0
% FSR Tested with DAC output = 0 V
% FSR FSR = 18.62 mA
1.12 1.235 1.35 V
1.235
V
2.2
5.0 mA
fCLK = 50 MHz
6.5
12.0 mA
fCLK = 140 MHz
11
15
mA
fCLK = 240 MHz
16
mA
fCLK = 330 MHz
67
72
mA
RSET = 560 Ω
8
mA
RSET = 4933 Ω
2.1
5.0 mA
PSAVE = low, digital, and control inputs at VDD
0.1
0.5 %/%
1 Temperature range TMIN to TMAX: −40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz and 330 MHz.
2 These max/min specifications are guaranteed by characterization in the 3.0 V to 3.6 V range.
3 Gain error = ((Measured (FSC)/Ideal (FSC) −1) × 100), where Ideal = VREF/RSET × K × (0xFFH) × 4 and K = 7.9896.
4 Digital supply is measured with continuous clock that has data input corresponding to a ramp pattern and with an input level at 0 V and VDD.
Rev. C | Page 4 of 16
 

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