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MAX1091 View Datasheet(PDF) - Maxim Integrated

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Description
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MAX1091 Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs
with +2.5V Reference and Parallel Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty
cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
Positive Supply Current
VLOGIC Current
Power-Supply Rejection
VDD
VLOGIC
IDD
ILOGIC
PSR
Operating mode,
fSAMPLE = 250ksps
Standby mode
Internal reference
External reference
Internal reference
External reference
Shutdown mode
CL = 20pF
fSAMPLE = 250ksps
Not converting
VDD = 3V ±10%, full-scale input
2.7
3.6
V
1.8
VDD + 0.3
V
2.3
2.6
1.9
0.9
2.3
1.2
mA
0.5
0.8
2
10
µA
150
µA
2
10
±0.4 ±0.9 mV
TIMING CHARACTERISTICS
(VDD = VLOGIC = +2.7V to +3.6V, COM = GND, REFADJ = VDD, VREF = +2.5V, 4.7µF capacitor at REF pin, fCLK = 4.8MHz (50% duty
cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
CLK Period
CLK Pulse Width High
CLK Pulse Width Low
Data Valid to WR Rise Time
WR Rise to Data Valid Hold Time
WR to CLK Fall Setup Time
CLK Fall to WR Hold Time
CS to CLK or WR
Setup Time
tCP
tCH
tCL
tDS
tDH
tCWS
tCWH
tCSWS
208
ns
40
ns
40
ns
40
ns
0
ns
40
ns
40
ns
60
ns
CLK or WR to CS
Hold Time
tCSWH
0
ns
CS Pulse Width
WR Pulse Width (Note 8)
CS Rise to Output Disable
tCS
tWR
tTC
CLOAD = 20pF (Figure 1)
100
ns
60
ns
20
100
ns
4 _______________________________________________________________________________________
 

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