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ADR431B View Datasheet(PDF) - Analog Devices

Part NameADR431B ADI
Analog Devices ADI
DescriptionUltralow Noise XFET® Voltage References with Current Sink and Source Capability
ADR431B Datasheet PDF : 24 Pages
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ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
Equation 3 shows that the apparent output impedance is reduced
by approximately the excess loop gain; therefore, as the frequency
increases, the excess loop gain decreases, and the apparent output
impedance increases. A passive element whose impedance
increases as its frequency increases is an inductor. When a
capacitor is added to the output of an op amp or a reference, it
forms a tuned circuit that resonates at a certain frequency and
results in gain peaking. This can be observed by using a model
of a semiperfect op amp with a single-pole response and some
pure resistance in series with the output. Changing capacitive
loads results in peaking at different frequencies. For most normal
op amp applications with low capacitive loading (<100 pF), this
effect is usually not observed.
However, references are used increasingly to drive the reference
input of an ADC that may present a dynamic, switching capacitive
load. Large capacitors, in the microfarad range, are used to reduce
the change in reference voltage to less than one-half LSB. Figure 31
shows the ADR431 noise spectrum with various capacitive values
to 50 μF. With no capacitive load, the noise spectrum is relatively
flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various
values of capacitive loading, the predicted noise peaking
becomes evident.
1000
ADR431
NO COMPENSATION
CL = 10µF
CL = 1µF
The op amp within the ADR43x family uses the classic RC
compensation technique. Monolithic capacitors in an IC are
limited to tens of picofarads. With very large external capacitive
loads, such as 50 μF, it is necessary to overcompensate the op amp.
The internal compensation node is brought out on Pin 7, and
an external series RC network can be added between Pin 7 and
the output, Pin 6, as shown in Figure 32.
VIN
+
10µF
0.1µF
TP
NC
GND
1
8 TP
2
ADR43x
COMP 82k
7
3
TOP VIEW
(Not to Scale)
6
VOUT
4
5 TRIM
10nF
0.1µF
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
Figure 32. Compensated Reference
The 82 kΩ resistor and 10 nF capacitor can eliminate the noise
peaking (see Figure 33). The COMP pin should be left
unconnected if unused.
100
CL = 10µF
RC 82kAND 10nF
CL = 1µF
RC 82kAND 10nF
CL = 50µF
RC 82kAND 10nF
CL = 50µF
100
CL = 0µF
10
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 31. Noise vs. Capacitive Loading
10
10
100
1k
10k
FREQUENCY (Hz)
Figure 33. Noise with Compensation Network
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components normally
associated with this are the time for the active circuits to settle
and the time for the thermal gradients on the chip to stabilize.
Figure 17 and Figure 18 show the turn-on settling time for the
ADR431.
Rev. J | Page 17 of 24
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GENERAL DESCRIPTION
The ADR43x series is a family of XFET voltage references featuring low noise, high accuracy, and low temperature drift performance. Using ADI’s patented temperature drift curvature correction and XFET (eXtra implanted junction FET) technology, the ADR43x’s voltage change versus temperature nonlinearity is minimized.

FEATURES
Low noise (0.1 Hz to 10 Hz): 3.5 µV p-p @ 2.5 V output
No external capacitor required
Low temperature coefficient
   A Grade: 10 ppm/°C max
   B Grade: 3 ppm/°C max
Load regulation: 15 ppm/mA
Line regulation: 20 ppm/V
Wide operating range
   ADR430: 4.1 V to 18 V
   ADR431: 4.5 V to 18 V
   ADR433: 5.0 V to 18 V
   ADR434: 6.1 V to 18 V
   ADR435: 7.0 V to 18 V
   ADR439: 6.5 V to 18 V
High output current: +30 mA/−20 mA
Wide temperature range: −40°C to +125°C

APPLICATIONS
Precision data acquisition systems
High resolution data converters
Medical instruments
Industrial process control systems
Optical control circuits
Precision instruments

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