ADR395 View Datasheet(PDF) - Analog Devices
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ADR395 Datasheet PDF : 20 Pages
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APPLICATIONS
BASIC VOLTAGE REFERENCE CONNECTION
The circuit shown in Figure 41 illustrates the basic configuration
for the ADR39x family. Decoupling capacitors are not required
for circuit stability. The ADR39x family is capable of driving
capacitive loads from 0 µF to 10 µF. However, a 0.1 µF ceramic
output capacitor is recommended to absorb and deliver the
charge, as required by a dynamic load.
SHUTDOWN
INPUT
*
CB 0.1µF
SHDN
GND
ADR39x
VIN
VOUT(S) VOUT(F)
*NOT REQUIRED
OUTPUT
*
CB 0.1µF
Figure 41. Basic Configuration for the ADR39x Family
Stacking Reference ICs for Arbitrary Outputs
Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. Figure 42 shows
how this stacked output reference can be implemented.
OUTPUT TABLE
U1/U2
VOUT1 (V) VOUT2 (V)
ADR390/ADR390
ADR391/ADR391
ADR392/ADR392
ADR395/ADR395
2.048
2.5
4.096
5
4.096
5.0
8.192
10
VIN
2 U2
VIN
C2
0.1µF
1
4
SHDN VOUT(F)
3
VOUT(S)
GND
5
VOUT2
C2
0.1µF
2 U1
VIN
1
SHDN
VOUT(F) 4
3
VOUT(S)
GND
5
VOUT1
Figure 42. Stacking Voltage References with the
ADR390/ADR391/ADR392/ADR395
ADR390/ADR391/ADR392/ADR395
Two reference ICs are used, fed from an unregulated input, VIN.
The outputs of the individual ICs are simply connected in
series, which provides two output voltages, VOUT1 and VOUT2.
VOUT1 is the terminal voltage of U1, while VOUT2 is the sum of
this voltage and the terminal voltage of U2. U1 and U2 are
simply chosen for the two voltages that supply the required
outputs (see the Output Table in Figure 42). For example, if
both U1 and U2 are ADR391s, VOUT1 is 2.5 V and VOUT2 is 5.0 V.
While this concept is simple, a precaution is required. Since the
lower reference circuit must sink a small bias current from U2
plus the base current from the series PNP output transistor in
U2, either the external load of U1 or R1 must provide a path for
this current. If the U1 minimum load is not well defined, the R1
resistor should be used and set to a value that will conservatively
pass 600 µA of current with the applicable VOUT1 across it. Note
that the two U1 and U2 reference circuits are treated locally as
macrocells; each has its own bypasses at input and output for
best stability. Both U1 and U2 in this circuit can source dc
currents up to their full rating. The minimum input voltage,
VIN, is determined by the sum of the outputs, VOUT2, plus the
dropout voltage of U2.
A Negative Precision Reference without Precision
Resistors
A negative reference can be easily generated by adding an A1 op
amp and is configured as shown in Figure 43. VOUTF and VOUTS
are at virtual ground and, therefore, the negative reference can
be taken directly from the output of the op amp. The op amp
must be dual-supply, low offset, and rail-to-rail if the negative
supply voltage is close to the reference output.
+VDD
2
VIN
4 VOUT(F)
3 VOUT(S) SHDN 1
GND
5
A1
–VREF
–VDD
Figure 43. Negative Reference
Rev. F | Page 17 of 20
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