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ADR03AKS-R2 View Datasheet(PDF) - Analog Devices

Part Name
Description
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ADR03AKS-R2 Datasheet PDF : 24 Pages
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ADR01/ADR02/ADR03/ADR06
OUTLINE DIMENSIONS
2.20
2.00
1.80
1.35
5
4
2.40
1.25
2.10
1.15
1
2
3
1.80
PIN 1
1.00
0.90
0.70
0.65 BSC
1.10
0.40
0.80
0.10
0.46
0.10 MAX
0.30
0.15
0.22
SEATING
0.08
0.36
0.26
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 44. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
2.90 BSC
1.60 BSC
5
4
1
2
3
2.80 BSC
*0.90 MAX
0.70 MIN
1.90
BSC
0.95 BSC
*1.00 MAX 0.20
0.08
0.10 MAX
0.50
0.30
SEATING
0.60
PLANE
0.45
0.30
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 45. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
5
6.20 (0.2441)
4 5.80 (0.2284)
0.25 (0.0098)
0.10 (0.0040)
1.27 (0.0500)
BSC
1.75 (0.0688)
1.35 (0.0532)
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
1.27 (0.0500)
0.25 (0.0098) 0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 46. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Rev. L | Page 17 of 24
 

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