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ADP121-AUJZ25R7 View Datasheet(PDF) - Analog Devices

Part NameADP121-AUJZ25R7 ADI
Analog Devices ADI
Description150 mA, Low Quiescent Current, CMOS Linear Regulator
ADP121-AUJZ25R7 Datasheet PDF : 20 Pages
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Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to +6.5 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP121 can be damaged when the junction
temperature limits are exceeded. Monitoring the ambient
temperature does not guarantee that the junction temperature
(TJ) is within the specified temperature limits. In applications
with high power dissipation and poor thermal resistance, the
maximum ambient temperature may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. TJ of the device is dependent on
the ambient temperature (TA), the power dissipation of the
device (PD), and the junction-to-ambient thermal resistance of
the package (θJA). TJ is calculated from TA and PD using the
following formula:
TJ = TA + (PD × θJA)
ADP121
Junction-to-ambient thermal resistance, θJA, is based on
modeling and calculation using a four-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending
on PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4” × 3”, circuit
board. Refer to JESD 51-7 and JESD 51-9 for detailed
information on the board construction. For additional
information, see AN-617 Application Note, MicroCSPTM
Wafer Level Chip Scale Package.
ΨJB is the junction-to-board thermal characterization parameter
measured in °C/W. ΨJB is based on modeling and calculation
using a four-layer board. The JESD51-12 Guidelines for Reporting
and Using Package Thermal Information states that thermal
characterization parameters are not the same as thermal
resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation
from the package, factors that make ΨJB more useful in real-
world applications. Maximum TJ is calculated from the board
temperature (TB) and PD using the following formula:
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed
information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
5-Lead TSOT
4-Ball 0.4 mm Pitch WLCSP
θJA
ΨJB Unit
170 43 °C/W
260 58 °C/W
ESD CAUTION
Rev. G | Page 5 of 20
Direct download click here
 

GENERAL DESCRIPTION
The ADP121 is a quiescent current, low dropout, linear regulator that operates from 2.3 V to 5.5 V and provides up to 150 mA of output current. The low 135 mV dropout voltage at 150 mA load improves efficiency and allows operation over a wide input voltage range. The low 30 μA of quiescent current at full load makes the ADP121 ideal for battery-operated portable equipment.
The ADP121 is available in output voltages ranging from 1.2 V to 3.3 V. The parts are optimized for stable operation with small 1 μF ceramic output capacitors. The ADP121 delivers good transient performance with minimal board area.
Short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. The ADP121 is available in a tiny 5-lead TSOT and 4-ball 0.4 mm pitch halide-free WLCSP packages and utilizes the smallest footprint solution to meet a variety of portable applications.

FEATURES
  Input voltage range: 2.3 V to 5.5 V
  Output voltage range: 1.2 V to 3.3 V
  Output current: 150 mA
  Low quiescent current
     IGND = 11 μA with 0 μA load
     IGND = 30 μA with 150 mA load
  Low shutdown current: <1 μA
  Low dropout voltage
     90 mV @ 150 mA load
  High PSRR
     70 dB @ 1 kHz at VOUT = 1.2 V
     70 dB @ 10 kHz at VOUT = 1.2 V
  Low noise: 40 μV rms at VOUT = 1.2 V
  No noise bypass capacitor required
  Output voltage accuracy: ±1%
  Stable with a small 1 μF ceramic output capacitor
  Current limit and thermal overload protection
  Logic controlled enable
  5-lead TSOT package
  4-ball 0.4 mm pitch WLCSP
 
APPLICATIONS
  Mobile phones
  Digital cameras and audio devices
  Portable and battery-powered equipment
  Post dc-to-dc regulation
  Post regulation

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