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ADP121CB-1.2-EVALZ View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADP121CB-1.2-EVALZ 150 mA, Low Quiescent Current, CMOS Linear Regulator ADI
Analog Devices ADI
ADP121CB-1.2-EVALZ Datasheet PDF : 20 Pages
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ADP121
Data Sheet
Parameter
POWER SUPPLY REJECTION RATIO
Symbol
PSRR
Conditions
10 kHz, VIN = 5 V, VOUT = 3.3 V
10 kHz, VIN = 5 V, VOUT = 2.5 V
10 kHz, VIN = 5 V, VOUT = 1.2 V
Min Typ Max Unit
60
dB
66
dB
70
dB
1 Based on an end-point calculation using 1 mA and 100 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.3 V.
3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITORS
Table 2.
Parameter
INPUT AND OUTPUT CAPACITOR1
Minimum Input and Output Capacitance
Capacitor ESR
Symbol
CMIN
RESR
Conditions
TA = −40°C to +125°C
TA = −40°C to +125°C
Min Typ Max Unit
0.70
0.001
µF
1
Ω
1 The minimum input and output capacitance should be greater than 0.70 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. G | Page 4 of 20
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