ADP-I2C-USB-Z View Datasheet(PDF) - Analog Devices

Part Name

Description

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ADP-I2C-USB-Z

Digital Power Factor Correction Controller with Accurate AC Power Metering

Analog Devices 

ADP1047/ADP1048

BRIDGELESS BOOST OPERATION (ADP1048 ONLY)

The bridgeless boost configuration allows removal of the con-

duction losses caused by the input bridge of the PFC converter.

In this configuration, it is necessary to drive the two power

MOSFETs separately to achieve the highest efficiency. The

ADP1048 can provide such signals. The IBAL pin is used to

detect the ac line phase and zero crossings. Note that the maxi-

mum rating on the IBAL pin is VDD + 0.3 V; therefore, a clamp

circuit must be connected to the IBAL pin.

AC

INPUT

VREC

RELAY

Data Sheet

During the positive ac line phase, only one boost stage is effec-

tively working. The second one is passive, and the current flows in

Q2 from the source to the drain. Turning the Q2 FET fully on

during this phase allows conduction losses in Q2 to be minimized.

When the ac line phase becomes negative, the roles of Q1 and Q2

are reversed, and Q2 actively switches while Q1 is always on. The

phase information is detected from the ac line via the IBAL pin.

During the soft start phase, both FETs are switching as a precau-

tionary measure; the same happens when the phase information

on the IBAL pin becomes corrupted or inaccurate.

T3

T1

T2

Q1

Q2

VOUT

BULK

CAPACITOR

3.3V

T1 + T2 + T3

1 AGND

2 VAC

3 VFB

4 OVP

5 PGND

6 ILIM

7 IBAL

8 CS–

9 CS+

10 DGND

11 PSON

12 VCORE

VDD 24

RES 23

RTD 22

ADD 21

SDA 20

PMBus

SCL 19

SYNC 18

INRUSH 17

PGOOD 16

AC_OK 15

PWM2 14

PWM 13

ADP1048

Figure 33. Schematic of Bridgeless PFC Circuit with the ADP1048

VAC

IBAL PIN

PWM

PWM2

Figure 34. Bridgeless Boost Operation

Rev. 0 | Page 32 of 84

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