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ADP1046A-100-EVALZ View Datasheet(PDF) - Analog Devices

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ADP1046A-100-EVALZ Datasheet PDF : 88 Pages
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Data Sheet
POWER SUPPLY CALIBRATION AND TRIM
The ADP1046A allows the entire power supply to be calibrated
and trimmed digitally in the production environment. It can
calibrate items such as output voltage and trim for tolerance
errors introduced by sense resistors and resistor dividers, as well
as its own internal circuitry. The part is factory trimmed, but it
can be retrimmed by the user to compensate for the errors intro-
duced by external components. The ADP1046A GUI allows the
user to automatically revert the trim settings to their factory
default values.
To unlock the trim registers for write access, write to the
TRIM_PASSWORD register (Register 0x89). Write the
trim password twice (the factory default password is 0xFF).
The ADP1046A allows the user enough trim capability to trim
for external components with a tolerance of 0.5% or better. If
the ADP1046A is not trimmed in the production environment,
it is recommended that components with a tolerance of 0.1% or
better be used for the inputs to CS1, CS2, VS1, VS2, and VS3 to
meet data sheet specifications.
CS1 TRIM
Using a DC Signal
A known voltage (Vx) is applied at the CS1 pin. The CS1 ADC
should output a digital code equal to Vx/1.4 × 4096. The CS1
gain trim register (Register 0x21) is adjusted until the CS1 ADC
value in Register 0x13[15:4] reads the correct digital code.
Using an AC Signal
A known current (Ix) is applied to the PSU input. This current
passes through a current transformer, a diode rectifier, and an
external resistor (RCS1) to convert the current information to a
voltage (Vx). This voltage is fed into the CS1 pin. The voltage
(Vx) is calculated as follows:
Vx = Ix × (N1/N2) × RCS1
where N1/N2 is the turns ratio of the current transformer.
The CS1 ADC outputs a digital code equal to Vx/1.4 × 4096. The
CS1 gain trim register (Register 0x21) is adjusted until the CS1
ADC value in Register 0x13[15:4] reads the correct digital code.
CS2 TRIM
The CS2 trim must compensate for offset and gain errors. The
offset error requires both an analog trim and a digital trim. This
error includes the mismatch of the level shifting resistors to the
inputs of the CS2± differential amplifier and the tolerance of the
current sense element.
CS2 Offset Trim
Offset errors can be introduced by the external level shifting
resistors and the internal current sources. It is best to use two
0.1% matched resistors or matched resistors within the same
package.
ADP1046A
It is important to perform the CS2 offset trim as described
in the following steps:
1. Set high-side or low-side current sensing using
Register 0x27[2].
2. Set the nominal full-scale sense resistor voltage drop in
Register 0x27[5] to 1 for the 120 mV range or to 0 for the
60 mV range.
3. Apply no-load current across the sense resistor.
4. Set the CS2 gain trim value to 0 (Register 0x23 = 0).
5. Set the CS2 digital offset trim value to 0 (Register 0x25 = 0).
6. Adjust the CS2 analog offset trim value in Register 0x24[6:0].
For the 120 mV range, adjust Register 0x24 until the CS2
value in Register 0x18[15:4] reads as close to 100 decimal
(0x64) as possible; this value must be greater than 50 (0x32).
For the 60 mV range, adjust Register 0x24 until the CS2
value in Register 0x18[15:4] reads as close to 200 decimal
(0xC8) as possible; this value must be greater than 100 (0x64).
7. Adjust the CS2 digital offset trim value in Register 0x25
until the CS2 value in Register 0x18[15:4] reads 0.
The offset trim is now completed, and the ADC code reads 0
when there is a no-load current across the sense resistor.
CS2 Gain Trim
After performing the offset trim, perform the gain trim to
remove any mismatch that is introduced by the sense resistor
tolerance. The ADP1046A can trim for sense resistors with a
tolerance of 1% or better.
1. Apply a known load current (IOUT) across the sense resistor.
2. Adjust the CS2 gain trim value in Register 0x23[5:0] until
the CS2 value in Register 0x18[15:4] reads the value
calculated by the following formula:
CS2 Value = IOUT × RSENSE/FS × 4096
where:
FS is the full-scale voltage drop (120 mV or 60 mV).
RSENSE is the sense resistor value.
If CS2 is programmed to the 120 mV range and IOUT = 10 A,
RSENSE = 10 mΩ, and FS = 120 mV,
CS2 Value = (10 A × 10 mΩ)/120 mV × 4096
CS2 Value = 3413 decimal
If CS2 is programmed to the 60 mV range and IOUT = 5 A,
RSENSE = 5 mΩ, and FS = 60 mV,
CS2 Value = (5 A × 5 mΩ)/60 mV × 4096
CS2 Value = 1707 decimal
The CS2 circuit is now trimmed. The OCP limits and settings
should be configured after the current sense trim is performed.
Rev. 0 | Page 33 of 88
 

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