ADP1053 View Datasheet(PDF) - Analog Devices
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ADP1053 Datasheet PDF : 84 Pages
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ADP1053
POWER SUPPLY CALIBRATION AND TRIM
The ADP1053 allows the entire power supply to be calibrated
and trimmed digitally in the production environment. It can
calibrate items such as output voltage and trim for tolerance
errors introduced by sense resistors, current transformers, and
resistor dividers, as well as for its own internal circuitry. The part
comes factory trimmed, but it can be retrimmed by the user to
compensate for the errors introduced by external components
in the system.
To unlock the trim registers for write access, write to the
TRIM_PASSWORD register (Command 0xD6). Write the
trim password twice (the factory default password is 0xFF).
The trim registers are Register 0xFE10 through Register 0xFE17,
Register 0xFE1C, Register 0xFE1D, Register 0xFE6E, Register
0xFE73, Register 0xFE74, Register 0xFE77, and Register 0xFE7C
through Register 0xFE7F. For complete information about these
registers, see the Manufacturer-Specific Extended Command
Register Descriptions section.
CS, CS1_A, AND CS1_B GAIN TRIM
To calibrate the CS, CS1_A, and CS1_B ADCs, 1 V is applied
between the CS/CS1_A/CS1_B pin and AGND. The CS/CS1_A/
CS1_B gain trim register (Register 0xFE6E, Register 0xFE10, or
Register 0xFE11, respectively) is altered until the CS/CS1_A/
CS1_B value in the appropriate value register reads 2560 decimal
(0xA00). The CS, CS1_A, and CS1_B value registers are Register
0xFED0, Register 0xFED1, and Register 0xFED2, respectively.
CS2_A AND CS2_B OFFSET AND GAIN TRIM
CS2_A and CS2_B Offset Trim
Offset errors are caused by the combined mismatch of the external
level-shifting resistors and internal current sources. The offset
trim has both an analog and a digital component. With 0 V at
the CS2 input, the desired ADC reading is 0 LSB.
The analog offset trim is performed to achieve a differential input
voltage of 0 V. The digital offset trim is performed to achieve an
ADC reading of 0 LSB. It is important to perform the offset trim
in the following order.
1. Select high-side or low-side current sensing using
Register 0xFE1A or Register 0xFE1B.
2. Set the digital offset trim setting to 0x00 using Register
0xFE14 or Register 0xFE15.
3. Adjust the CS2 analog offset trim value (Register 0xFE16 or
Register 0xFE17) until the CS2 value in Register 0xFED3 or
Register 0xFED4 reads as close to 100 decimal as possible.
4. Increase the CS2 digital offset trim register value (Register
0xFE14 or Register 0xFE15) until the CS2 value in Register
0xFED3 or Register 0xFED4 reads 0.
The offset trim is now complete. With 0 V at the CS2 input, the
ADC code now reads 0.
Data Sheet
CS2_A and CS2_B Gain Trim
The gain trim removes any errors introduced by the sense
resistor tolerance.
1. Apply a known current (IOUT) across the sense resistor.
2. Adjust the CS2 gain trim value in Register 0xFE12 or
Register 0xFE13 until the CS2 value in Register 0xFED3 or
Register 0xFED4 reads the value calculated by this formula:
CS2 Value = IOUT × RSENSE × (4096/120 mV)
where RSENSE is the sense resistor value.
For example, if IOUT = 4.64 A and RSENSE = 20 mΩ,
CS2 Value = 4.64 A × 20 mΩ × (4096/120 mV) = 3168
(decimal).
The CS2 circuit is now trimmed. After the current sense trim is
performed, the OCP limits and settings should be configured.
VS_A AND VS_B GAIN TRIM
The voltage sense inputs are optimized for sensing signals at 1 V
and cannot sense a signal greater than 1.5 V. In a 28 V system, a
resistor divider is required to reduce the 28 V signal to below
1.5 V. It is recommended that the 28 V signal be reduced to 1 V
for best performance. The resistor divider can introduce errors,
which need to be trimmed.
The ADCs output a digital word of 2560 decimal (0xA00) when
there is exactly 1 V at their inputs.
ACSNS GAIN TRIM
The voltage sense inputs are optimized for ACSNS pin signals
at 1 V and cannot sense a signal greater than 1.5 V. A resistor
divider is required to reduce the sensed voltage signal to below
1.5 V. It is recommended that the ACSNS voltage signal be
reduced to 1 V for best performance. The resistor divider can
introduce errors, which need to be trimmed.
The following procedure should be used:
1. Apply nominal voltage at the sense point to achieve a
voltage of approximately 1 V at the ACSNS pin.
2. Adjust the ACSNS gain trim register (Register 0xFE77)
until the ACSNS reading in Register 0xFED9 is 0x500
(1280 decimal).
Rev. A | Page 32 of 84
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