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ADM1487EARZ View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADM1487EARZ 5 V, ±15 kV ESD Protected Half-Duplex, RS-485/RS-422 Transceivers ADI
Analog Devices ADI
ADM1487EARZ Datasheet PDF : 16 Pages
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ADM485E/ADM487E/ADM1487E
TIMING SPECIFICATIONS
VCC = 5 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 3. ADM485E/ADM1487E
Parameter
DRIVER
Driver Propagation Delay Input to Output, Low to High
Symbol Min Typ Max
tDPLH
10 40 60
Driver Propagation Delay Input to Output, High to Low
tDPHL
10 40 60
Output Skew to Output
tSKEW
5
10
Rise/Fall Time
tDR, tDF
3
20 40
Enable Time to High Level
tDZH
Enable Time to Low Level
tDZL
Disable Time from Low Level
tDLZ
Disable Time from High Level
tDHZ
RECEIVER
Receiver Propagation Delay Input to Output, Low to High tRPLH
Receiver Propagation Delay Input to Output, High to Low tRPHL
|tPLH − tPHL| Differential Receiver Skew
tSKEW
Enable Time to Low Level
tRZL
Enable Time to High Level
tRZH
Disable Time from Low Level
tRLZ
Disable Time from High Level
tRHZ
MAXIMUM DATA RATE
fMAX
45 70
45 70
45 70
45 70
20 60 200
20 60 200
5
25 50
20 50
20 50
20 50
2.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Mbps
Test Conditions/Comments
RDIFF = 54 Ω, CL1 = CL2 = 100 pF
(see Figure 19 and Figure 20)
RDIFF = 54 Ω, CL1 = CL2 = 100 pF
(see Figure 19 and Figure 20)
RDIFF = 54 Ω, CL1 = CL2 = 100 pF
(see Figure 19 and Figure 20)
RDIFF = 54 Ω, CL1 = CL2 = 100 pF
(see Figure 19 and Figure 20)
CL = 100 pF, S1 closed (see Figure 21)
CL = 100 pF, S1 closed (see Figure 22)
CL = 15 pF, S1 closed (see Figure 22)
CL = 15 pF, S1 closed (see Figure 21)
See Figure 23 and Figure 24
See Figure 23 and Figure 24
See Figure 23 and Figure 24
CL = 15 pF, S2 closed (see Figure 25)
CL = 15 pF, S1 closed (see Figure 25)
CL = 15 pF, S2 closed (see Figure 25)
tPLH, tPHL < 50% of data period
Rev. B | Page 4 of 16
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