ADM1166ACPZ View Datasheet(PDF) - Analog Devices

Part Name

Description

View to exact match

ADM1166ACPZ

Super Sequencer with Margining Control and Nonvolatile Fault Recording

Analog Devices 

ADM1166

The hysteresis value is given by

VHYST = VR × NTHRESH/255

where:

VHYST is the desired hysteresis voltage.

NTHRESH is the decimal value of the 5-bit hysteresis code.

Note that NTHRESH has a maximum value of 31. The maximum

hysteresis for the ranges is listed in Table 6.

INPUT GLITCH FILTERING

The final stage of the SFDs is a glitch filter. This block provides

time-domain filtering on the output of the SFD comparators,

which allows the user to remove any spurious transitions such

as supply bounce at turn-on. The glitch filter function is in addition

to the digitally programmable hysteresis of the SFD comparators.

The glitch filter timeout is programmable up to 100 μs.

For example, when the glitch filter timeout is 100 μs, any pulse

appearing on the input of the glitch filter block that is less than

100 μs in duration is prevented from appearing on the output of

the glitch filter block. Any input pulse that is longer than 100 μs

appears on the output of the glitch filter block. The output is

delayed with respect to the input by 100 μs. The filtering process is

shown in Figure 23.

INPUT PULSE SHORTER

THAN GLITCH FILTER TIMEOUT

INPUT PULSE LONGER

THAN GLITCH FILTER TIMEOUT

PROGRAMMED

TIMEOUT

PROGRAMMED

TIMEOUT

INPUT

t0

tGF

INPUT

t0

tGF

OUTPUT

OUTPUT

t0

tGF

t0

tGF

Figure 23. Input Glitch Filter Function

SUPPLY SUPERVISION WITH VXx INPUTS

The VXx inputs have two functions. They can be used as either

supply fault detectors or digital logic inputs. When selected as

analog (SFD) inputs, the VXx pins have functionality that is very

similar to the VH and VPx pins. The primary difference is that the

VXx pins have only one input range: 0.573 V to 1.375 V. Therefore,

these inputs can directly supervise only the very low supplies.

However, the input impedance of the VXx pins is high, allowing

an external resistor divide network to be connected to the pin.

Thus, potentially any supply can be divided down into the input

range of the VXx pin and supervised. This enables the ADM1166

to monitor other supplies, such as +24 V, +48 V, and −5 V.

An additional supply supervision function is available when the

VXx pins are selected as digital inputs. In this case, the analog

function is available as a second detector on each of the dedicated

analog inputs, VPx and VH. The analog function of VX1 is

mapped to VP1, VX2 is mapped to VP2, and so on. VX5 is

mapped to VH. In this case, these SFDs can be viewed as

secondary or warning SFDs.

The secondary SFDs are fixed to the same input range as the

primary SFDs. They are used to indicate warning levels rather

than failure levels. This allows faults and warnings to be generated

on a single supply using only one pin. For example, if VP1 is set

to output a fault when a 3.3 V supply drops to 3.0 V, VX1 can be

set to output a warning at 3.1 V. Warning outputs are available for

readback from the status registers. They are also OR’ed together

and fed into the SE, allowing warnings to generate interrupts on

the PDOs. Therefore, in this example, if the supply drops to 3.1 V,

a warning is generated, and remedial action can be taken before

the supply drops out of tolerance.

VXx PINS AS DIGITAL INPUTS

As discussed in the Supply Supervision with VXX Inputs section,

the VXx input pins on the ADM1166 have dual functionality.

The second function is as a digital logic input to the device.

Therefore, the ADM1166 can be configured for up to five digital

inputs. These inputs are TTL-/CMOS-compatible inputs. Standard

logic signals can be applied to the pins: RESET from reset generators,

PWRGD signals, fault flags, and manual resets. These signals are

available as inputs to the SE and, therefore, can be used to control

the status of the PDOs. The inputs can be configured to detect

either a change in level or an edge.

When configured for level detection, the output of the digital

block is a buffered version of the input. When configured for edge

detection, a pulse of programmable width is output from the

digital block once the logic transition is detected. The width is

programmable from 0 μs to 100 μs. The digital blocks feature the

same glitch filter function that is available on the SFDs. This

enables the user to ignore spurious transitions on the inputs. For

example, the filter can be used to debounce a manual reset switch.

When configured as digital inputs, each VXx pin has a weak

(10 μA) pull-down current source available for placing the input

into a known condition, even if left floating. The current source,

if selected, weakly pulls the input to GND.

VXx

(DIGITAL INPUT)

+

DETECTOR

–

GLITCH

FILTER

TO

SEQUENCING

ENGINE

VREF = 1.4V

Figure 24. VXx Digital Input Function

Rev. 0 | Page 15 of 32

Share Link: