datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

ADM1028ARQ View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
ADM1028ARQ Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADM1028
STOP condition. In READ mode, the master device will
override the acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse. This is
known as No Acknowledge. The master will then take the
data line low during the low period before the tenth clock
pulse, then high during the tenth clock pulse to assert a
STOP condition.
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADM1028, write operations contain either
one or two bytes, and read operations contain one byte, and
perform the following functions:
To write data to one of the device data registers or read data
from it, the Address Pointer Register must be set so that the
correct data register is addressed, then data can be written into
that register or read from it. The first byte of a write operation
always contains an address that is stored in the Address Pointer
Register. If data is to be written to the device, the write opera-
tion contains a second data byte that is written to the register
selected by the address pointer register.
This is illustrated in Figure 2a. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the Address Pointer
Register. The second data byte is the data to be written to the
internal data register.
When reading data from a register there is only one possibility:
1. The serial bus address is written to the device along with the
address pointer register value. The ADM1028 should then
acknowledge the write by pulling SDA low during the ninth
clock pulse. The master does not generate a STOP condition
but issues a new START condition. The serial bus address
is again sent but with the R/W bit high, indicating a READ
operation. The ADM1028 will then return the data from the
selected register, and a No Acknowledge is generated to signify
the end of the read operation. The master will then initiate a
STOP condition to end the transaction and release the SMBus.
In Figures 2a and 2b, the serial bus address is shown as the
default value 0101110.
1
9
1
9
SCL
SDA
0
START BY
MASTER
1
0
1
1
1
0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADM1028
D6 D5 D4 D3 D2 D1 D0
FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADM1028
1
9
SCL (CONTINUED)
SDA (CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0
FRAME 3
DATA BYTE
ACK. BY STOP BY
ADM1028 MASTER
Figure 2a. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
1
9
1
9
SCL
SDA
0
START BY
MASTER
1
0
1
1
1
0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADM1028
D6 D5 D4 D3 D2 D1 D0
ACK. BY
ADM1028
FRAME 2
ADDRESS POINTER REGISTER BYTE
1
9
1
9
SCL
SDA
0
START BY
MASTER
REV. A
1
0
1
1
1
0 R/W
D7 D6 D5 D4 D3 D2 D1
ACK. BY
ADM1028
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM1028
Figure 2b. Reading Data from the ADM1028
D0
NO ACK. STOP BY
BY MASTER MASTER
–7–
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]