ADM1026 View Datasheet(PDF) - Analog Devices

Part Name

Description

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ADM1026

Complete Thermal System Management Controller

Analog Devices 

ADM1026

1

91

9

SCL

SDA

0

1

START BY

MASTER

0

1

1 A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0

FRAME 1

SLAVE ADDRESS

ACK. BY

SLAVE

FRAME 2

COMMAND CODE

ACK. BY

SLAVE

1

9

1

9

SCL

(CONTINUED)

SDA

(CONTINUED)

D7 D6 D5 D4 D3 D2 D1 D0

FRAME 3

DATA BYTE

ACK. BY

SLAVE

D7 D6 D5 D4 D3 D2 D1 D0

FRAME N

DATA BYTE

ACK. BY

SLAVE

STOP BY

MASTER

1

SCL

Figure 17. General SMBus Write Timing Diagram

9

1

9

SDA

0

START BY

MASTER

1

0

1

1

A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0

FRAME 1

SLAVE ADDRESS

ACK. BY

SLAVE

FRAME 2

DATA BYTE

ACK. BY

MASTER

1

9

1

9

SCL

(CONTINUED)

SDA

(CONTINUED)

D7 D6 D5 D4 D3 D2 D1 D0

FRAME 3

DATA BYTE

ACK. BY

MASTER

D7 D6 D5 D4 D3 D2 D1 D0

NO ACK.

FRAME N

DATA BYTE

STOP BY

MASTER

Figure 18. General SMBus Read Timing Diagram

SMBus PROTOCOLS FOR RAM AND EEPROM

EEPROM Registers 1 and 2 are for factory use only. EEPROM

The ADM1026 contains volatile registers (RAM) and non-

volatile EEPROM. RAM occupies Addresses 00h to 6Fh, while

EEPROM occupies Addresses 8000h to 9FFFh.

Register 3 sets up the EEPROM operating mode. Setting Bit 0 of

EEPROM Register 3 puts the EEPROM into read mode. Setting

Bit 1 puts it into programming mode. Setting Bit 2 puts it into

erase mode.

Data can be written to and read from both RAM and EEPROM

as single data bytes and as block (sequential) read or write

operations of 32 data bytes, the maximum block size allowed by

the SMBus specification.

Only one of these bits must be set before the EEPROM may be

accessed. Setting no bits or more than one of them causes the

device to respond with No Acknowledge if an EEPROM read,

program, or erase operation is attempted.

Data can only be written to unprogrammed EEPROM locations.

To write new data to a programmed location, it is first necessary

to erase it. EEPROM erasure cannot be done at the byte level;

the EEPROM is arranged as 128 pages of 64 bytes, and an entire

page must be erased. Note that of these 128 pages, only 124

pages are available to the user. The last four pages are reserved

for manufacturing purposes and cannot be erased/rewritten.

It is important to distinguish between SMBus write opera-

tions, such as sending an address or command, and EEPROM

programming operations. It is possible to write an EEPROM

address over the SMBus, whatever the state of EEPROM

Register 3. However, EEPROM Register 3 must be correctly set

before a subsequent EEPROM operation can be performed. For

example, when reading from the EEPROM, Bit 0 of EEPROM

The EEPROM has three RAM registers associated with it,

Register 3 can be set, even though SMBus write operations are

EEPROM Registers 1, 2, and 3 at Addresses 06h, 0Ch, and 13h.

required to set up the EEPROM address for reading.

Rev. A | Page 13 of 56

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