|ADF4360-5BCPZRL7||Integrated Synthesizer and VCO|
|ADF4360-5BCPZRL7 Datasheet PDF : 24 Pages |
VCO Phase-Noise Performance8
Synthesizer Phase-Noise Floor9
In-Band Phase Noise10, 11
RMS Integrated Phase Error12
Spurious Signals due to PFD Frequency11, 13
Level of Unlocked Signal with MTLD Enabled
B Version Unit
@ 100 kHz offset from carrier.
@ 1 MHz offset from carrier.
@ 3 MHz offset from carrier.
@ 10 MHz offset from carrier.
@ 25 kHz PFD frequency.
@ 200 kHz PFD frequency.
@ 8 MHz PFD frequency.
@ 1 kHz offset from carrier.
100 Hz to 100 kHz.
1 Operating temperature range is –40°C to +85°C.
2 Guaranteed by design. Sample tested to ensure compliance.
3 ICP is internally modified to maintain constant loop gain over the frequency range.
4 TA = 25°C; AVDD = DVDD = VVCO = 3.3 V; P = 32.
5 These characteristics are guaranteed for VCO core power = 10 mA.
6 Jumping from 1.15 GHz to 1.40 GHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
7 Using 50 Ω resistors to VVCO into a 50 Ω load. For tuned loads, see the Output Matching section.
8 The noise of the VCO is measured in open-loop conditions.
9 The synthesizer phase-noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value).
10 The phase noise is measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for the
synthesizer; offset frequency = 1 kHz.
11 fREFIN = 10 MHz; fPFD = 200 kHz; N = 6500; Loop B/W = 10 kHz.
12 fREFIN = 10 MHz; fPFD = 1 MHz; N = 1300; Loop B/W = 25 kHz.
13 The spurious signals are measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for
the synthesizer; fREFOUT = 10 MHz @ 0 dBm.
Rev. A | Page 4 of 24
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