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ADF4360-5 View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADF4360-5 Integrated Synthesizer and VCO ADI
Analog Devices ADI
ADF4360-5 Datasheet PDF : 24 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Hardware Power-Up/Power-Down
If the ADF4360-5 is powered down via the hardware (using the
CE pin) and powered up again without any change to the N
counter register during power-down, it locks at the correct fre-
quency because it is already in the correct frequency band. The
lock time depends on the value of capacitance on the CN pin,
which is <5 ms for 10 µF capacitance. The smaller capacitance
of 440 nF on this pin enables lock times of <600 µs.
The N counter value cannot be changed while the part is in
power-down because the part may not lock to the correct fre-
quency on power-up. If it is updated, the correct programming
sequence for it after power-up is to the R counter latch, followed
by the control latch, and finally the N counter latch, with the
required interval between the control latch and N counter latch,
as described in the Initial Power-Up section.
ADF4360-5
Software Power-Up/Power-Down
If the ADF4360-5 is powered down via the software (using the
control latch) and powered up again without any change to the
N counter latch during power-down, it locks at the correct fre-
quency because it is already in the correct frequency band. The
lock time depends on the value of capacitance on the CN pin,
which is <5 ms for 10 µF capacitance. The smaller capacitance
of 440 nF on this pin enables lock times of <600 µs.
The N counter value cannot be changed while it is in power-
down because the part may not lock to the correct frequency on
power-up. If it is updated, the correct programming sequence
for it after power-up is to the R counter latch, followed by the
control latch, and finally the N counter latch, with the required
interval between the control latch and N counter latch, as de-
scribed in the Initial Power-Up section.
Rev. A | Page 17 of 24
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