ADE7816ACPZ-RL View Datasheet(PDF) - Analog Devices
Part Name
Description
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ADE7816ACPZ-RL Datasheet PDF : 48 Pages
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ADE7816
Data Sheet
Parameter 1, 2
Min Typ Max
WAVEFORM SAMPLING
Current and Voltage Channels
Signal-to-Noise Ratio, SNR
70
Signal-to-Noise-and-Distortion Ratio, SINAD
60
Bandwidth (−3 dB)
2
TIME INTERVAL BETWEEN CHANNELS
Measurement Error
0.3
REFERENCE INPUT
REFIN/OUT Input Voltage Range
1.1
1.3
Input Capacitance
10
ON-CHIP REFERENCE
Reference Error
±2
Output Impedance
1.2
Temperature Coefficient
10
50
CLKIN, CLKOUT
Input Clock Frequency
Crystal Equivalent Series Resistance
CLKIN Input Capacitance
CLKOUT Output Capacitance
LOGIC INPUTS—MOSI/SDA, SCLK/SCL,
SS/HSA, RESET, PULL_HIGH, PULL_LOW
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
16.22
30
2.0
Input Capacitance, CIN
LOGIC OUTPUTS—IRQ0, IRQ1, MISO/HSD
Output High Voltage, VOH
2.4
ISOURCE
Output Low Voltage, VOL
ISINK
POWER SUPPLY
VDD Pin
3.0
IDD
1 See the Typical Performance Characteristics section.
2 See the Terminology section for a definition of the parameters.
16.384
20
20
16.55
200
0.8
−8.7
3
100
10
800
0.4
2
3.6
25
27.8
Unit
Test Conditions/Comments
Sampling CLKIN/2048, 16.384 MHz/2048 = 8 kSPS
See the Instantaneous Waveforms section
dB
PGA = 1
dB
PGA = 1
kHz
Degrees Line frequency = 45 Hz to 65 Hz, HPF on
V
pF
mV
kΩ
ppm/°C
MHz
Ω
pF
pF
Minimum = 1.2 V − 8%; maximum = 1.2 V + 8%
Nominal 1.207 V at the REFIN/OUT pin at TA = 25°C
Maximum value across full temperature range
of −40°C to +85°C
All specifications are for CLKIN, CLKOUT of
16.384 MHz
V
VDD = 3.3 V ± 10%
V
VDD = 3.3 V ± 10%
μA
Input = 0 V, VDD = 3.3 V
μA
Input = VDD = 3.3 V
nA
Input = VDD = 3.3 V
pF
VDD = 3.3 V ± 10%
V
VDD = 3.3 V ± 10%
μA
V
VDD = 3.3 V ± 10%
mA
For specified performance
V
Minimum = 3.3 V − 10%; maximum = 3.3 V + 10%
mA
Rev. 0 | Page 4 of 48
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