|ADF4110BRU-REEL||RF PLL Frequency Synthesizers|
|ADF4110BRU-REEL Datasheet PDF : 28 Pages |
DIRECT CONVERSION MODULATOR
In some applications, a direct conversion architecture can be
used in base station transmitters. Figure 37 shows the combina-
tion available from ADI to implement this solution.
The circuit diagram shows the AD9761 being used with the
AD8346. The use of dual integrated DACs such as the AD9761
with specified ±0.02 dB and ±0.004 dB gain and offset matching
characteristics ensures minimum error contribution (over
temperature) from this portion of the signal chain.
The local oscillator (LO) is implemented using the ADF4113. In
this case, the OSC 3B1-13M0 provides the stable 13 MHz
reference frequency. The system is designed for a 200 kHz
channel spacing and an output center frequency of 1960 MHz.
The target application is a WCDMA base station transmitter.
Typical phase noise performance from this LO is −85 dBc/Hz at
a 1 kHz offset.
The LO port of the AD8346 is driven in single-ended fashion.
LOIN is ac-coupled to ground with the 100 pF capacitor; LOIP
is driven through the ac coupling capacitor from a 50 Ω source.
An LO drive level of between −6 dBm and −12 dBm is required.
The circuit of Figure 37 gives a typical level of −8 dBm.
The RF output is designed to drive a 50 Ω load but must be ac-
coupled as shown in Figure 37. If the I and Q inputs are driven
in quadrature by 2 V p-p signals, the resulting output power is
around −10 dBm.
FS ADJ QOUTB
POWER SUPPLY CONNECTIONS AND DECOUPLING CAPACITORS
ARE OMITTED FROM DIAGRAM TO INCREASE CLARITY.
Figure 37. Direct Conversion Transmitter Solution
Rev. C | Page 25 of 28
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