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ADDAC85 Просмотр технического описания (PDF) - Analog Devices

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ADDAC85 Complete Low Cost 12-Bit D/A Converters ADI
Analog Devices ADI
ADDAC85 Datasheet PDF : 16 Pages
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ADDAC80/ADDAC85/ADDAC87–SPECIFICATIONS (continued)
Model
ADDAC85LD
Min Typ Max
ADDAC85MIL
Min Typ Max
POWER SUPPLY REQUIREMENTS
Rated Voltages
Range
Analog Supplies
Logic Supplies
Supply Drain7
+15 V
–15 V
+5 V8
± 15, 5
± 14.5
+4.5
± 15.5
± 15.5
15
20
25
30
15
20
± 15, 5
± 14.5
+4.5
± 15.5
+15.5
15
20
25
30
15
20
TEMPERATURE RANGE
Specification
Operating
Storage
–25
+85
–55
+125
–55
+125
–55
+125
–55
+125
–55
+125
NOTES
1Least Significant Bit.
2Adjustable to zero with external trim potentiometer.
3FSR means “Full-Scale Range” and is 20 V for the ± 10 V range and 10 V for the ± 5 V range.
4Gain and offset errors adjusted to zero at 25°C.
5CF = 0, see Figure 3a.
6Maximum with no degradation of specification, must be a constant load.
7Including 5 mA load.
85 V supply required only for CCD versions.
Specifications subject to change without notice.
ADDAC87
Min Typ Max
± 15, 5
± 13.5
+4.5
± 16.5
± 16.5
10
20
20
35
10
20
–55
+125
–55
+125
–65
+150
Unit
V
V
V
mA
mA
mA
°C
°C
°C
ABSOLUTE MAXIMUM RATINGS
+VS to Power Ground . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
–VS to Power Ground . . . . . . . . . . . . . . . . . . . . 0 V to –18 V
Digital Inputs (Pins 1 to 12) to Power Ground . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.0 V to +7 V
Ref In to Reference Ground . . . . . . . . . . . . . . . . . . . . . ± 12 V
Bipolar Offset to Reference Ground . . . . . . . . . . . . . . ± 12 V
10 V Span R to Reference Ground . . . . . . . . . . . . . . . ± 12 V
20 V Span R to Reference Ground . . . . . . . . . . . . . . . ± 24 V
Ref Out . . . . . . . . . Indefinite Short to Power Ground or +VS
(MSB) BIT 1 1
BIT 2 2
BIT 3 3
BIT 4 4
BIT 5 5
BIT 6 6
BIT 7 7
BIT 8 8
BIT 9 9
BIT 10 10
BIT 11 11
(LSB) BIT 12 12
REF
CONTROL
CIRCUIT
24 VREF OUT
23 GAIN ADJUST
22 +VS
12-BIT
RESISTOR
LADDER
NETWORK
AND
CURRENT
SWITCHES
21 COMMON
5k
20 SUMMING JUNCTION
19 20V RANGE
5k
18 10V RANGE
17 BIPOLAR OFFSET
6.3k
16 REF INPUT
+
15 VOUT
14 VS
ADDAC80 13 NC/+VL*
*NC = CBI VERSIONS
5V CCD VERSIONS
Figure 1. Voltage Model Function Diagram
and Pin Configuration
(MSB) BIT 1 1
BIT 2 2
BIT 3 3
BIT 4 4
BIT 5 5
BIT 6 6
BIT 7 7
BIT 8 8
BIT 9 9
BIT 10 10
BIT 11 11
(LSB) BIT 12 12
12-BIT
RESISTOR
LADDER
NETWORK
AND
CURRENT
SWITCHES
REF
CONTROL
CIRCUIT
24 VREF OUT
23 GAIN ADJUST
22 +VS
21 COMMON
5k
20
2k
19
5k18
17
6.3k
16
SCALING NETWORK
SCALING NETWORK
SCALING NETWORK
BIPOLAR OFFSET
REF INPUT
*NC = CBI VERSIONS
5V CCD VERSIONS
15 IOUT
14 VS
13 NC/+VL*
Figure 2. Current Model Functional Diagram
and Pin Configuration
–6–
REV. B
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