|ADC081500||High Performance, Low Power, 8-Bit, 1.5 GSPS A/D Converter|
National ->Texas Instruments
|ADC081500 Datasheet PDF : 34 Pages |
LVDS Clock input pins for the ADC. The differential clock
signal must be a.c. coupled to these pins. The input signal
is sampled on the falling edge of CLK+. See Section 2.3.
Analog signal inputs to the ADC. The differential full-scale
input range of this input is programmable using the FSR pin
14 in normal mode and the Input Full-Scale Voltage Adjust
register in the extended control mode. Refer to the VIN
specification in the Converter Electrical Characteristics for
the full-scale input range in the normal mode. Refer to ??
1.4 for the full-scale input range in the extended control
Common Mode Voltage. The voltage output at this pin is
required to be the common mode input voltage at VIN+ and
VIN− when d.c. coupling is used. This pin should be
grounded when a.c. coupling is used at the analog inputs.
This pin is capable of sourcing or sinking 100 μA. See
Bandgap output voltage capable of 100 μA source/sink.
Calibration Running indication. This pin is at a logic high
when calibration is running.
External bias resistor connection. Nominal value is 3.3 k-
Ohms (±0.1%) to ground. See Section 1.1.1.
Temperature Diode Positive (Anode) and Negative
(Cathode). These pins may be used for die temperature
measurements, however no specified accuracy is implied
or guaranteed. See Section 2.6.2.
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