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ADC081000 View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
ADC081000 High Performance, Low Power 8-Bit, 1 GSPS A/D Converter National-Semiconductor
National ->Texas Instruments National-Semiconductor
ADC081000 Datasheet PDF : 30 Pages
First Prev 21 22 23 24 25 26 27 28 29 30
TABLE 3. DIFFERENTIAL INPUT TO OUTPUT
RELATIONSHIP (FSR High)
VIN+
VCM − 200 mV
VCM − 99 mV
VCM
VIN
VCM + 200 mV
VCM + 99 mV
VCM
Output Code
0000 0000
0100 0000
0111 1111 /
1000 0000
VCM + 101 mV
VCM + 200mV
VCM − 101 mV
VCM − 200 mV
1100 0000
1111 1111
Note that a precise d.c. common mode voltage must be
present at the ADC inputs. This common mode voltage,
VCMO, is provided on-chip when DC_Coup (pin 14) is low and
the input signal is a.c. coupled to the ADC. See Figure 4.
20068149
FIGURE 4. Differential Input Drive
When pin 14 is high, the analog inputs are d.c. coupled and
a common mode voltage must be externally provided at the
analog input pins. This common mode voltage should track
the VCMO output voltage. Note that the VCMO output potential
will change with temperature. The common mode output of
the driving device should track this change. Full-scale distor-
tion performance falls off rapidly as the input common mode
voltage deviates from VCMO. This is a direct result of using a
very low supply voltage to minimize power. Keep the input
common voltage within 50 mV of VCMO.
Performance of the ADC081000 is as good in the d.c. coupled
mode as it is in the a.c. coupled mode, provided the input
common mode voltage at both analog input pins remain within
50 mV of VCMO.
If d.c. coupling is used, it is best to servo the input common
mode voltage, using the VCMO pin, to maintain optimum per-
formance.
Be sure that any current drawn from the VCMO output does not
exceed ±1 μA.
The Input impedance in the d.c. coupled mode (DC_Coup pin
high) consists of a precision 100 Ohm resistor between VIN+
and VIN- and a capacitance from each of these inputs to
ground. Driving the inputs beyond full scale will result in sat-
uration or clipping of the reconstructed output.
3.1 Handling Single-Ended Analog Signals
There is no provision for the ADC081000 to adequately pro-
cess single-ended input signals. The best way to handle
single-ended signals is to convert them to differential signals
before presenting them to the ADC. The easiest way to ac-
complish single-ended to differential signal conversion is with
an appropriate balun, as shown in Figure 5.
A balun is especially designed for very high frequencies and
has a wider bandwidth than does a transformer so is perferred
over a transformer for use with very high frequencies.
The ADC081000 is not designed to work with single-ended
signals, so it is NOT RECOMMENDED that this be done.
However, if the resulting drop in performance is allowable,
drive the ADC08100 with a single-ended signal by bypassing
the unused input to a.c. ground with a capacitor or connect it
directly to the VCMO pin. DO NOT connect either input pin di-
rectly to ground.
20068146
FIGURE 5. Single-Ended to Differential signal conversion
with a balun
When d.c. coupling to the ADC081000 analog inputs is re-
quired, single-ended to differential conversion may be easily
accomplished with the LMH6555, as shown in Figure 6. In
such applications, the LMH6555 performs the task of single-
ended to differential conversion while delivering low distortion
and noise, as well as output balance, that supports the oper-
ation of the ADC081000. Connecting the ADC081000 VCMO
pin to the VCM_REF pin of the LMH6555, through the appropri-
ate buffer, will ensure that the ADC081000 common mode
input voltage is as needed for optimum performance of the
ADC081000. See Figure 6. The LMV321 was chosen as the
buffer in Figure 6 for its low voltage operation and reasonable
offset voltage. Be sure to limit output current from the
ADC081000 VCMO pin to 1.0 μA.
20068155
FIGURE 6. Example of Servoing the Analog Input with
VCMO
3.2 Out Of Range (OR) Indication
When the conversion result is clipped the Out of Range output
is activated such that OR+ goes high and OR- goes low. This
output is active as long as accurate data on either or both of
the buses would be outside the range of 00h to FFh.
3.3 Full-Scale Input Range
As with all A/D Converters, the input range is determined by
the value of the ADC's reference voltage. The reference volt-
age of the ADC081000 is derived from an internal bandgap
reference. The FSR pin controls the effective reference volt-
age of the ADC081000 such that the differential full-scale
input range at the analog inputs is 800 mVP-P with the FSR
pin high, or is 600 mVP-P with FSR pin low. Best SNR is ob-
tained with FSR high, but better distortion and SFDR are
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