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ADC08031CIN View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
ADC08031CIN 8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options, Voltage Reference, and Track/Hold Function National-Semiconductor
National ->Texas Instruments National-Semiconductor
ADC08031CIN Datasheet PDF : 24 Pages
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Electrical Characteristics (Continued)
The following specifications apply for VCC = VREF = +5 VDC, and fCLK = 1 MHz unless otherwise specified. Boldface limits
apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 8)
(Note 9)
(Limits)
DIGITAL AND DC CHARACTERISTICS
IOUT
ISOURCE
ISINK
ICC
TRI-STATE® Output Current
Output Source Current
Output Sink Current
Supply Current
ADC08031, ADC08034,
VOUT = 0V
VOUT = 5V
VOUT = 0V
VOUT = VCC
CS = HIGH
−3.0
µA (max)
3.0
µA (max)
−6.5
mA (min)
8.0
mA (min)
3.0
mA (max)
and ADC08038
ADC08032 (Note 16)
7.0
mA (max)
REFERENCE CHARACTERISTICS
VREFOUT Nominal Reference Output
VREFOUT Option
Available Only on
2.6
V
ADC08034 and
ADC08038
Electrical Characteristics
The following specifications apply for VCC = VREF = +5 VDC, and tr = tf = 20 ns unless otherwise specified. Boldface limits
apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 8) (Note 9)
(Limits)
fCLK
Clock Frequency
10
kHz (min)
1
MHz (max)
Clock Duty Cycle
40
% (min)
(Note 14)
60
% (max)
TC
Conversion Time (Not Including
MUX Addressing Time)
fCLK = 1 MHz
8
1/fCLK (max)
8
µs (max)
tCA
tSELECT
tSET-UP
Acquisition Time
CLK High while CS is High
CS Falling Edge or Data Input
Valid to CLK Rising Edge
12
1/fCLK(max)
50
ns
25
ns (min)
tHOLD
Data Input Valid after CLK
Rising Edge
20
ns (min)
tpd1, tpd0
CLK Falling Edge to Output
Data Valid (Note 15)
CL = 100 pF:
Data MSB First
250
ns (max)
Data LSB First
200
ns (max)
t1H, t0H
TRI-STATE Delay from Rising Edge
CL = 10 pF, RL = 10 k
50
ns
of CS to Data Output and SARS Hi-Z
(see TRI-STATE Test Circuits)
CIN
COUT
Capacitance of Logic Inputs
Capacitance of Logic Outputs
CL = 100 pF, RL = 2 k
180
ns (max)
5
pF
5
pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed speci-
fications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance character-
istics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to AGND = DGND = 0 VDC, unless otherwise specified.
Note 4: When the input voltage VIN at any pin exceeds the power supplies (VIN < (AGND or DGND) or VIN > VCC) the current at that pin should be limited to 5 mA.
The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA and the ambient temperature, TA. The maximum
allowable power dissipation at any temperature is PD = (TJMAX − TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For these de-
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