AD9869 View Datasheet(PDF) - Analog Devices
Part Name
Description
View to exact match
AD9869 Datasheet PDF : 36 Pages
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Pin No.
17, 64
18, 63
19
20
21
22
23
24
25 to 29
30
31, 34, 36, 39, 44, 47, 48
32, 33
35, 40, 43
37, 38
41
42
45, 49
46
50
51
52
53
54
55
56
57
58
59
60
61
62
Mnemonic
DRVDD
DRVSS
CLKOUT1
SDIO
SDO
SCLK
SEN
GAIN
PGA[5]
PGA[4:0]
RESET
AVSS
REFB, REFT
AVDD
RX−, RX+
REFADJ
REFIO
NC
IOUTN−
IOUTN+
IOUTP−
IOUTP+
MODE
CONFIG
CLKVSS
XTAL
OSCIN
CLKVDD
DVSS
DVDD
CLKOUT2
PWRDWN
1 HD = half-duplex mode; FD = full-duplex mode.
Mode1
FD
HD or FD
HD or FD
AD9869
Description
Digital Output Driver Supply Input.
Digital Output Driver Supply Return.
fADC/N Clock Output (R = 1, 2, or 3).
Serial Port Data Input/Output.
Serial Port Data Output.
Serial Port Clock Input.
Serial Port Enable Input.
Tx Data Port (Tx[5:0]) Mode Select.
MSB of PGA Input Data Port.
Bit 4 to Bit 0 of PGA Input Data Port.
Reset Input (Active Low).
Analog Supply Return.
ADC Reference Decoupling Nodes.
Analog Power Supply Input.
Receive Path − and + Analog Inputs.
TxDAC Full-Scale Current Adjust.
TxDAC Reference Input/Output.
Do Not Connect; Leave Open.
−Tx Mirror Current Output Sink.
+Tx Mirror Current Output Sink.
−TxDAC Current Output Source.
+TxDAC Current Output Source.
Digital Interface Mode Select Input, Low = HD, High = FD.
Power-Up SPI Register Default Setting Input.
Clock Oscillator/Synthesizer Supply Return.
Crystal Oscillator Inverter Output.
Crystal Oscillator Inverter Input.
Clock Oscillator/Synthesizer Supply.
Digital Supply Return.
Digital Supply Input.
fOSCIN/L Clock Output (L = 1, 2, or 4).
Power-Down Input.
Rev. 0 | Page 11 of 36
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