AD9868 View Datasheet(PDF) - Analog Devices
Part Name
Description
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AD9868 Datasheet PDF : 36 Pages
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AD9868
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
ADIO9/Tx[5] 1
ADIO8/Tx[4] 2
ADIO7/Tx[3] 3
ADIO6/Tx[2] 4
ADIO5/Tx[1] 5
ADIO4/Tx[0] 6
ADIO3/Rx[5] 7
ADIO2/Rx[4] 8
ADIO1/Rx[3] 9
ADIO0/Rx[2] 10
NC/Rx[1] 11
NC/Rx[0] 12
RXEN/RXSYNC 13
TXEN/TXSYNC 14
TXCLK/TXQUIET 15
RXCLK 16
PIN 1
IDENTIFIER
AD9868
TOP VIEW
(Not to Scale)
48 AVSS
47 AVSS
46 IOUTN–
45 NC
44 AVSS
43 AVDD
42 REFIO
41 REFADJ
40 AVDD
39 AVSS
38 RX+
37 RX–
36 AVSS
35 AVDD
34 AVSS
33 REFT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 2. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
1
ADIO9
Tx[5]
2 to 5
ADIO8 to ADIO5
Tx[4:1]
6
ADIO4
Tx[0]
7
ADIO3
Rx[5]
8, 9
ADIO2, ADIO1
Rx[4:3]
10
ADIO0
Rx[2]
11
NC
Rx[1]
12
NC
Rx[0]
13
RXEN
RXSYNC
14
TXEN
TXSYNC
15
TXCLK
TXQUIET
16
RXCLK
Mode 1
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
HD
FD
Description
MSB of ADIO Buffer.
MSB of Tx Nibble Input.
Bit 8 to Bit 5 of ADIO Buffer.
Bit 4 to Bit 1 of Tx Nibble Input.
Bit 4 of ADIO Buffer.
LSB of Tx Nibble Input.
Bit 3 of ADIO Buffer.
MSB of Rx Nibble Output.
Bit 2 to Bit 1 of ADIO Buffer.
Bit 4 to Bit 3 of Rx Nibble Output.
LSB of ADIO Buffer.
Bit 2 of Rx Nibble Output.
No Connect.
Bit 1 of Rx Nibble Output.
No Connect.
LSB of Rx Nibble Output.
ADIO Buffer Control Input.
Rx Data Synchronization Output.
Tx Path Enable Input.
Tx Data Synchronization Input.
ADIO Sample Clock Input.
Fast TxDAC/IAMP Power-Down.
ADIO Request Clock Input.
Rx and Tx Clock Output at 2 x fADC.
Rev. 0 | Page 10 of 36
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