AD9865 View Datasheet(PDF) - Analog Devices
Part Name
Description
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AD9865 Datasheet PDF : 48 Pages
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AD9865
Parameter
POWER CONSUMPTION (Half-Duplex Operation with fDATA = 50 MSPS)2
Tx Mode
IAVDD + ICLKVDD
IDVDD + IDRVDD
Rx Mode
IAVDD + ICLKVDD
IDVDD + IDRVDD
POWER CONSUMPTION OF FUNCTIONAL BLOCKS1 (IAVDD + ICLKVDD)
RxPGA and LPF
ADC
TxDAC
IAMP (Programmable)
Reference
CLK PLL and Synthesizer
MAXIMUM ALLOWABLE POWER DISSIPATION
STANDBY POWER CONSUMPTION
IS_TOTAL (Total Supply Current)
POWER DOWN DELAY (USING PWR_DWN PIN)
RxPGA and LPF
ADC
TxDAC
IAMP
CLK PLL and synthesizer
POWER UP DELAY (USING PWR_DWN PIN)
RxPGA and LPF
ADC
TxDAC
IAMP
CLK PLL and Synthesizer
Temp
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Test Level Min
IV
IV
IV
IV
III
III
III
III
10
III
III
IV
III
III
III
III
III
III
III
III
III
III
Typ Max Unit
112 130 mA
46
49.5 mA
225 253 mA
36.5 39
mA
87
mA
108
mA
38
mA
120 mA
170
mA
107
mA
1.66 W
13
mA
440
ns
12
ns
20
ns
20
ns
27
ns
7.8
µs
88
ns
13
µs
20
ns
20
µs
1 Default power-up settings for MODE = HIGH and CONFIG = LOW, IOUTP_FS = 20 mA, does not include IAMP’s current consumption, which is application dependent.
2 Default power-up settings for MODE = LOW and CONFIG = LOW.
DIGITAL SPECIFICATIONS
AVDD = 3.3 V ± 5%, DVDD = CLKVDD = DRVDD = 3.3 V ± 10%; RSET = 2 kΩ, unless otherwise noted.
Table 4.
Parameter
Temp Test Level Min
CMOS LOGIC INPUTS
High Level Input Voltage
Low Level Input Voltage
Input Leakage Current
Input Capacitance
Full VI
Full VI
Full VI
DRVDD – 0.7
CMOS LOGIC OUTPUTS (CLOAD = 5 pF)
High Level Output Voltage (IOH = 1 mA)
Full VI
Low Level Output Voltage (IOH = 1 mA)
Full VI
Output Rise/Fall Time (High Strength Mode and CLOAD = 15 pF) Full
VI
Output Rise/Fall Time (Low Strength Mode and CLOAD = 15 pF)
Full
VI
Output Rise/Fall Time (High Strength Mode and CLOAD = 5 pF)
Full
VI
Output Rise/Fall Time (Low Strength Mode and CLOAD = 5 pF)
Full VI
RESET
Minimum Low Pulse Width (Relative to fADC)
DRVDD – 0.7
1
Typ Max
0.4
12
3
0.4
1.5/2.3
1.9/2.7
0.7/0.7
1.0/1.0
Unit
V
V
µA
pF
V
V
ns
ns
ns
ns
Clock
cycles
Rev. A | Page 6 of 48
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