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AD9777 View Datasheet(PDF) - Analog Devices

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AD9777 Datasheet PDF : 60 Pages
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AD9777
DIGITAL SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 0 V, DVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.
Table 3.
Parameter
DIGITAL INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
CLOCK INPUTS
Input Voltage Range
Common-Mode Voltage
Differential Voltage
SERIAL CONTROL BUS
Maximum SCLK Frequency (fSLCK)
Mimimum Clock Pulse Width High (tPWH)
Mimimum Clock Pulse Width Low (tPWL)
Maximum Clock Rise/Fall Time
Minimum Data/Chip Select Setup Time (tDS)
Minimum Data Hold Time (tDH)
Maximum Data Valid Time (tDV)
RESET Pulse Width
Inputs (SDI, SDIO, SCLK, CSB)
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
SDIO Output
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Min
2.1
−10
−10
0
0.75
0.5
15
30
30
25
0
1.5
2.1
−10
−10
DRVDD − 0.6
30
30
Typ
Max
Unit
3
V
0
0.9
V
+10
µA
+10
µA
5
pF
3
V
1.5
2.25
V
1.5
V
MHz
ns
ns
1
ms
ns
ns
30
ns
ns
3
V
0
0.9
V
+10
µA
+10
µA
5
pF
V
0.4
V
50
mA
50
mA
Rev. C | Page 7 of 60
 

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