datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD9712BBN View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
AD9712BBN
ADI
Analog Devices ADI
AD9712BBN Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9712B/AD9713B
Full-scale output current is determined by CONTROL AMP
IN and RSET according to the equation:
IOUT (FS) = (CONTROL AMP IN/RSET) × 128
The internal reference is nominally –1.18 V with a tolerance of
± 3.5% and typical drift over temperature of 50 ppm/°C. If
greater accuracy or better temperature stability is required, an
external reference can be utilized. The AD589 reference shown
in Figure 1 features ± 10 ppm/°C drift over temperatures from
0°C to +70°C.
AD589
AD9712B
+
AD9713B
R1
~–11k
19 CONTROL
AMP IN
–VS
Figure 1. Use of AD589 as External Reference
Two modes of multiplying operation are possible with the
AD9712B/AD9713B. Signals with small signal bandwidths up
to 300 kHz and input swings of 100 mV, or dc signals from
–0.6 V to –1.2 V can be applied to the CONTROL AMP input
as shown in Figure 2. Because the control amplifier is internally
compensated, the 0.1 µF capacitor at Pin 17 can be reduced to
0.01 µF to maximize the multiplying bandwidth. However, it
should be noted that settling time for changes to the digital in-
puts will be degraded.
RSET
24 RSET
–0.6V TO –1.2V
300 kHz MAX
19 CONTROL
AMP IN
RT
AD9712B
AD9713B
18 CONTROL
AMP OUT
18
17 REFERENCE
IN
The REFERENCE IN pin can also be driven directly for wider
bandwidth multiplying operation. The analog signal for this
mode of operation must have a signal swing in the range of
–3.75 V to –4.25 V. This can be implemented by capacitively
coupling into REFERENCE IN a signal with a dc bias of –3.75 V
to –4.25 V, as shown in Figure 3; or by driving REFERENCE
IN with a low impedance op amp whose signal swing is limited
to the stated range.
Outputs
As indicated earlier, D1–D4 (four MSBs) are decoded and drive
15 discrete current sinks. D5 and D6 are binarily weighted; and
D7–D12 are applied to the R-2R network. This segmented archi-
tecture reduces frequency domain errors due to glitch impulse.
REFERENCE
IN
17
~–4V
AD9712B
AD9713B
–V S
–VS
Figure 3. Wideband Multiplying Circuit
The Switch Network provides complementary current outputs
IOUT and IOUT. These current outputs are based on statistical
current source matching which provides 12-bit linearity without
trim. Current is steered to either IOUT or IOUT in proportion to
the digital input code. The sum of the two currents is always
equal to the full-scale output current minus one LSB.
The current output can be converted to a voltage by resistive
loading as shown in Figure 4. Both IOUT and IOUT should be
loaded equally for best overall performance. The voltage which
is developed is the product of the output current and the value
of the load resistor.
Figure 2. Low Frequency Multiplying Circuit
–6–
REV. B
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]