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AD9650-65EBZ View Datasheet(PDF) - Analog Devices

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Description
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AD9650-65EBZ Datasheet PDF : 44 Pages
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AD9650
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.35 V internal reference, DCS disabled,
unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)1
Integral Nonlinearity (INL)1
MATCHING CHARACTERISTIC
Offset Error
Gain Error
TEMPERATURE DRIFT
Offset Error
Gain Error
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1.35 V
Mode)
Load Regulation at 1.0 mA
INPUT REFERRED NOISE
VREF = 1.35 V
ANALOG INPUT
Input Span, VREF = 1.35 V
Input Capacitance2
Input Common-Mode Voltage
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
Supply Voltage
AVDD
DRVDD
Supply Current
IAVDD1
IDRVDD1 (1.8 V CMOS)
IDRVDD1 (1.8 V LVDS)
POWER CONSUMPTION
DC Input
Sine Wave Input1 (DRVDD =
1.8 V CMOS Output Mode)
Sine Wave Input1 (DRVDD =
1.8 V LVDS Output Mode)
Standby Power3
Power-Down Power
Temp
Full
AD9650BCPZ-25
Min Typ Max
16
AD9650BCPZ-65
Min Typ Max
16
AD9650BCPZ-80
Min Typ Max
16
AD9650BCPZ-105
Min Typ Max Unit
16
Bits
Full
Guaranteed
Guaranteed
Guaranteed
Guaranteed
Full
±0.2 ±0.5
±0.2 ±0.5
±0.4 ±0.70
±0.4 ±0.7 % FSR
Full
±0.4 ±2.5
±0.4 ±2.5
±0.4 ±2.5
±0.4 ±2.5 % FSR
Full −1
+1.3 −1
+1.3 −1
+1.3 −1
+1.3 LSB
25°C
±0.7
±0.7
±0.7
±0.7
LSB
Full
±3
±5
±6
±6 LSB
25°C
±1.6
±2.5
±2.5
±3
LSB
Full
±0.1 ±0.4
±0.1 ±0.4
±0.1 ±0.4
±0.1 ±0.4 % FSR
Full
±0.5 ±1.3
±0.5 ±1.3
±0.5 ±1.3
±0.5 ±1.3 % FSR
Full
±2
±2
±2
Full
±15
±15
±15
±2
ppm/°C
±15
ppm/°C
Full
±7
±14
±7
±14
±7
±14
±7
±14 mV
Full
10
10
10
10
mV
25°C
1.5
1.5
1.5
1.5
LSB
rms
Full
2.7
2.7
2.7
Full
11
11
11
Full
0.9
0.9
0.9
Full
6
6
6
2.7
V p-p
11
pF
0.9
V
6
Full 1.7 1.8
Full 1.7 1.8
1.9 1.7 1.8
1.9 1.7 1.8
1.9 1.7 1.8
1.9 1.7 1.8
1.9 1.7 1.8
1.9 1.7 1.8
1.9 V
1.9 V
Full
125 131
202 209
267 275
332 340 mA
Full
8
23
29
36
mA
Full
72
86
90
100
mA
Full
237 254
397 408
522 537
656 675 mW
Full
240
405
533
663
mW
Full
355
520
642
778
mW
Full
50
50
50
50
mW
Full
0.25 2.5
0.25 2.5
0.25 2.5
0.25 2.5 mW
1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
2 Input capacitance refers to the effective capacitance between one differential input pin and AGND.
3 Standby power is measured with a dc input and with the CLK+ and CLK− pins inactive (set to AVDD or AGND).
Rev. 0 | Page 3 of 44
 

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