AD9648BCPZRL7-125 View Datasheet(PDF) - Analog Devices

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AD9648BCPZRL7-125

14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter

Analog Devices 

14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual

Analog-to-Digital Converter

AD9648

FEATURES

1.8 V analog supply operation

1.8 V CMOS or LVDS outputs

SNR = 74.5 dBFS @ 70 MHz

SFDR = 91 dBc @ 70 MHz

Low power: 78 mW/channel ADC core @ 125 MSPS

Differential analog input with 650 MHz bandwidth

IF sampling frequencies to 200 MHz

On-chip voltage reference and sample-and-hold circuit

2 V p-p differential analog input

DNL = ±0.35 LSB

Serial port control options

Offset binary, gray code, or twos complement data format

Optional clock duty cycle stabilizer

Integer 1-to-8 input clock divider

Data output multiplex option

Built-in selectable digital test pattern generation

Energy-saving power-down modes

Data clock out with programmable clock and data

alignment

APPLICATIONS

Communications

Diversity radio systems

Multimode digital receivers

GSM, EDGE, W-CDMA, LTE,

CDMA2000, WiMAX, TD-SCDMA

I/Q demodulation systems

Smart antenna systems

Broadband data applications

Battery-powered instruments

Hand held scope meters

Portable medical imaging

Ultrasound

Radar/LIDAR

1This product is protected by a U.S patent.

FUNCTIONAL BLOCK DIAGRAM

AVDD

AGND

SDIO SCLK CSB

VIN+A

VIN–A

VREF

SENSE

VCM

RBIAS

VIN–B

VIN+B

REF

SELECT

SPI

ADC

PROGRAMMING DATA

AD9648

ADC

DIVIDE DUTY CYCLE

1 TO 8 STABILIZER

MODE

CONTROLS

ORA

D13A

D0A

DCOA

DRVDD

ORB

D13B

D0B

DCOB

CLK+ CLK–

SYNC

DCS

PDWN DFS OEB

NOTES

1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;

SEE FIGURE 7 FOR LVDS PIN NAMES.

Figure 1.

PRODUCT HIGHLIGHTS

1. The AD96481 operates from a single 1.8 V analog

power supply and features a separate digital output

driver supply to accommodate 1.8 V CMOS or LVDS

logic families.

2. The patented sample-and-hold circuit maintains

excellent performance for input frequencies up to

200 MHz and is designed for low cost, low power, and

ease of use.

3. A standard serial port interface supports various

product features and functions, such as data output

formatting, internal clock divider, power-down,

DCO/data timing and offset adjustments.

4. The AD9648 is packaged in a 64-lead RoHS compliant

LFCSP that is pin compatible with the AD9650/

AD9269/AD9268 16-bit ADC, the AD9258 14-bit

ADC, the AD9628/AD9231 12-bit ADCs, and the

AD9608/AD9204 10-bit ADCs, enabling a simple

migration path between 10-bit and 16-bit converters

sampling from 20 MSPS to 125 MSPS.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

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Tel: 781.329.4700

www.analog.com

Fax: 781.461.3113

©2011 Analog Devices, Inc. All rights reserved.

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