datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD9642-170EBZ View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
AD9642-170EBZ Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
CLK+ 1
CLK– 2
AVDD 3
D0–/D1– (LSB) 4
D0+/D1+ (LSB) 5
D2–/D3– 6
D2+/D3+ 7
DRVDD 8
AD9642
INTERLEAVED
LVDS
TOP VIEW
(Not to Scale)
24 CSB
23 SCLK
22 SDIO
21 DCO+
20 DCO–
19 D12+/D13+ (MSB)
18 D12–/D13– (MSB)
17 DRVDD
AD9642
NOTES
1. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE
PACKAGE PROVIDES THE ANALOG GROUND FOR THE
PART. THIS EXPOSED PADDLE MUST BE CONNECTED TO
GROUND FOR PROPER OPERATION.
2. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 3. LFCSP Pin Configuration (Top View)
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
ADC Power Supplies
8, 17
DRVDD
3, 27, 28, 31, 32
AVDD
0
AGND,
Exposed Paddle
25
ADC Analog
30
29
26
DNC
VIN+
VIN−
VCM
1
2
Digital Outputs
5
4
7
6
10
9
12
11
14
13
16
15
19
18
21
20
SPI Control
23
22
24
CLK+
CLK−
D0+/D1+ (LSB)
D0−/D1− (LSB)
D2+/D3+
D2−/D3−
D4+/D5+
D4−/D5−
D6+/D7+
D6−/D7−
D8+/D9+
D8−/D9−
D10+/D11+
D10−/D11−
D12+/D13+ (MSB)
D12−/D13− (MSB)
DCO+
DCO−
SCLK
SDIO
CSB
Type
Supply
Supply
Ground
Input
Input
Output
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/output
Input
Description
Digital Output Driver Supply (1.8 V Nominal).
Analog Power Supply (1.8 V Nominal).
Analog Ground. The exposed thermal paddle on the bottom of the package provides
the analog ground for the part. This exposed paddle must be connected to ground for
proper operation.
Do Not Connect. Do not connect to this pin.
Differential Analog Input Pin (+).
Differential Analog Input Pin (−).
Common-Mode Level Bias Output for Analog Inputs. This pin should be decoupled
to ground using a 0.1 μF capacitor.
ADC Clock Input—True.
ADC Clock Input—Complement.
DDR LVDS Output Data 0/1—True.
DDR LVDS Output Data 0/1—Complement.
DDR LVDS Output Data 2/3—True.
DDR LVDS Output Data 2/3—Complement.
DDR LVDS Output Data 4/5—True.
DDR LVDS Output Data 4/5—Complement.
DDR LVDS Output Data 6/7—True.
DDR LVDS Output Data 6/7—Complement.
DDR LVDS Output Data 8/9—True.
DDR LVDS Output Data 8/9—Complement.
DDR LVDS Output Data 10/11—True.
DDR LVDS Output Data 10/11—Complement.
DDR LVDS Output Data 12/13—True.
DDR LVDS Output Data 12/13—Complement.
LVDS Data Clock Output—True.
LVDS Data Clock Output—Complement.
SPI Serial Clock.
SPI Serial Data I/O.
SPI Chip Select (Active Low).
Rev. B | Page 9 of 28
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]