AD9642BCPZRL7-250 View Datasheet(PDF) - Analog Devices
Part Name
Description
View to exact match
AD9642BCPZRL7-250
Analog Devices
AD9642BCPZRL7-250 Datasheet PDF : 28 Pages
| |||
AD9642
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Electrical
AVDD to AGND
DRVDD to AGND
VIN+, VIN− to AGND
CLK+, CLK− to AGND
VCM to AGND
CSB to AGND
SCLK to AGND
SDIO to AGND
D0−/D1−, D0+/D1+ Through
D12−/D13−, D12+/D13+ to AGND
DCO+, DCO− to AGND
Environmental
Operating Temperature Range
(Ambient)
Maximum Junction Temperature
Under Bias
Storage Temperature Range
(Ambient)
Rating
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−40°C to +85°C
150°C
−65°C to +125°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Data Sheet
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for the
LFCSP package. Soldering the exposed paddle to the customer
board increases the reliability of the solder joints, maximizing
the thermal capability of the package.
Table 7. Thermal Resistance
Package Type
Airflow
Velocity
(m/sec)
32-Lead LFCSP 0
5 mm × 5 mm 1.0
(CP-32-12)
2.0
θJA1, 2
37.1
32.4
29.1
θJC1, 3
3.1
θJB1, 4
20.7
Unit
°C/W
°C/W
°C/W
1 Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
3 Per MIL-Std 883, Method 1012.1.
4 Per JEDEC JESD51-8 (still air).
Typical θJA is specified for a 4-layer PCB with a solid ground
plane. As shown in Table 7, airflow increases heat dissipation,
which reduces θJA. In addition, metal in direct contact with the
package leads from metal traces—through holes, ground, and
power planes—reduces the θJA.
ESD CAUTION
Rev. B | Page 8 of 28
|
|
Share Link: