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AD9252 View Datasheet(PDF) - Analog Devices

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AD9252 Datasheet PDF : 52 Pages
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AD9252
Data Sheet
AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 2.
AD9252-50
Parameter1
Temperature Min Typ
Max Unit
SIGNAL-TO-NOISE RATIO (SNR)
fIN = 2.4 MHz
Full
73.2
dB
fIN = 19.7 MHz
Full
71
73
dB
fIN = 35 MHz
Full
72.7
dB
fIN = 70 MHz
Full
71
dB
SIGNAL-TO-NOISE AND DISTORTION RATIO (SINAD)
fIN = 2.4 MHz
Full
72.5
dB
fIN = 19.7 MHz
Full
70.2 72.2
dB
fIN = 35 MHz
Full
72
dB
fIN = 70 MHz
Full
70.5
dB
EFFECTIVE NUMBER OF BITS (ENOB)
fIN = 2.4 MHz
Full
11.87
Bits
fIN = 19.7 MHz
Full
11.5 11.84
Bits
fIN = 35 MHz
Full
11.79
Bits
fIN = 70 MHz
Full
11.5
Bits
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
fIN = 2.4 MHz
Full
85
dBc
fIN = 19.7 MHz
Full
73
84
dBc
fIN = 35 MHz
Full
83
dBc
fIN = 70 MHz
Full
79
dBc
WORST HARMONIC (SECOND OR THIRD)
fIN = 2.4 MHz
Full
−85
dBc
fIN = 19.7 MHz
Full
−84
−73
dBc
fIN = 35 MHz
Full
−83
dBc
fIN = 70 MHz
Full
−79
dBc
WORST OTHER (EXCLUDING SECOND OR THIRD)
fIN = 2.4 MHz
Full
−90
dBc
fIN = 19.7 MHz
Full
−90
−80
dBc
fIN = 35 MHz
Full
−90
dBc
fIN = 70 MHz
Full
−89
dBc
TWO-TONE INTERMODULATION DISTORTION (IMD)—AIN1 AND AIN2 = −7.0 dBFS
fIN1 = 15 MHz, fIN2 = 16 MHz
25°C
80.0
dBc
fIN1 = 70 MHz, fIN2 = 71 MHz
25°C
80.0
dBc
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.
Rev. E | Page 4 of 52
 

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