AD9237 View Datasheet(PDF) - Analog Devices
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AD9237 Datasheet PDF : 28 Pages
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AD9237
Table 7. Reference Configuration Summary
Selected Mode
SENSE Voltage
External Reference
AVDD
Resulting VREF (V)
N/A
Internal Fixed Reference
Programmable Reference
VREF
0.2 V to VREF
0.5
0.5 × (1 + R2/R1)
(See Figure 40)
Internal Fixed Reference
AGND to 0.2 V
1.0
Span Factor
2
1
2
1
2
1
2
1
Resulting Differential Span (V p-p)
4 × External Reference
Span _ Factor
1.0 V
4.0 V
4 ×VREF
Span _ Factor
2.0 V
1.0 V
VOLTAGE REFERENCE
A stable and accurate 0.5 V voltage reference is built into
the AD9237. The input range can be adjusted by varying
the reference voltage applied to the AD9237, using either the
internal reference or an externally applied reference voltage.
The input span of the ADC tracks reference voltage changes
linearly.
In all reference configurations, REFT and REFB drive the
A/D conversion core and, in conjunction with the span factor,
establish its input span. The input range of the ADC always
equals four times the voltage at the reference pin divided by
the span factor for either an internal or an external reference.
It is required to decouple REFT to REFB with 0.1 μF and 10 μF
decoupling capacitors, as shown in Figure 39.
Internal Reference Connection
A comparator within the AD9237 detects the potential at
the SENSE pin and configures the reference into one of four
possible states, which are summarized in Table 7. If SENSE is
grounded, the reference amplifier switch is connected to the
internal resistor divider, setting VREF to 1 V (see Figure 39).
Connecting the SENSE pin to VREF switches the reference
amplifier output to the SENSE pin, completing the loop and
providing a 0.5 V reference output. If a resistor divider is
connected, as shown in Figure 40, then the switch is again set to
the SENSE pin. This puts the reference amplifier in a non-
inverting mode with the VREF output defined as
VREF
= 0.5 × ⎜⎝⎛1 +
R2
R1
⎟⎠⎞
VIN+
VIN–
10μF +
VREF
0.1μF
SENSE
SELECT
LOGIC
ADC
CORE
REFT
0.1μF
0.1μF
REFB
0.1μF
+
10μF
0.5V
AD9237
Figure 39. Internal Reference Configuration
VIN+
VIN–
10μF +
VREF
0.1μF
R2
SENSE
R1
SELECT
LOGIC
ADC
CORE
REFT
0.1μF
0.1μF
REFB
0.1μF
+
10μF
0.5V
AD9237
Figure 40. Programmable Reference Configuration
Rev. 0 | Page 18 of 28
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