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AD9129 View Datasheet(PDF) - Analog Devices

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AD9129 Datasheet PDF : 68 Pages
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Data Sheet
AD9119/AD9129
The IRQ pin responds only to those interrupts that are enabled. To
clear an IRQ, it is necessary to write a 1b to the bit in Register 0x05
or Register 0x06 that caused the interrupt. See Figure 141 for
a detailed diagram of the interrupt circuitry.
The IRQ can also be used during the AD9119/AD9129
initialization phase after power-up to determine when the
retimer PLL and data receiver controllers achieve lock. For
example, before enabling the retimer PLL, the retimer lock
interrupt enable bit (Register 0x03[0]) can be set, and the IRQ
output signal can be monitored to determine when lock is
established, before continuing in a similar manner with the data
receiver controller. Clear the relevant lock bit, after locking, before
continuing to the next controller. When all of the controllers are
locked, set the appropriate lost lock enable bits in Register 0x03
to continuously monitor the controllers for loss of lock.
WRITE 1b TO
REQUEST BIT
R
IRQ ENABLE
DQ
SOURCE
SINGLE IRQ BIT
IRQ ENABLE
IRQ REQUEST
IRQ ENABLE
IRQ PIN
Table 15. Interrupt Request Registers
Addr (Hex) Bit Bit Name
0x05
7 FIFO_Warn2 interrupt status
6 FIFO_Warn1 interrupt status
5 SPIFrmAck interrupt status
4 Reserved
3 DLL warn interrupt status
2 DLL lock interrupt status
1 Retimer lost interrupt status
0 Retimer lock interrupt status
0x06
7 Reserved
6 AED pass interrupt status
5 AED fail interrupt status
4 SED fail interrupt status
3 Parity error falling edge status
2 Parity error rising edge status
1 Reserved
0 Reserved
Figure 141. Interrupt Request Circuitry
Description
Indicates that the FIFO is within two slots of overwrite
Indicates that the FIFO is within one slot of overwrite
Indicates acknowledgement that the SFrmReq bit has changed from 0b to 1b
Reserved
Indicates that the DLL is close to coming unlocked and action is needed
Indicates that the DLL is now locked
Indicates that the retimer PLL is no longer locked
Indicates that the retimer PLL is now locked
Reserved
Indicates that the AED logic has captured eight valid samples
Indicates that the AED logic has detected a miscompare
Indicates that the SED logic has detected a miscompare
Indicates a parity fault due to data captured on the falling edge
Indicates a parity fault due to data captured on the rising edge
Reserved
Reserved
Rev. 0 | Page 47 of 68
 

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