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AD9114 View Datasheet(PDF) - Analog Devices

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AD9114 Datasheet PDF : 48 Pages
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COARSE GAIN ADJUSTMENT
Option 1
A coarse full-scale output current adjustment can be achieved
using the lower six bits in Register 0x0D. This adds or subtracts
up to 20% from the band gap voltage on Pin 34 (REFIO), and
the voltage on the FSADJx resistors tracks this change. As a result,
the DAC full-scale current varies the same amount. A second-
ary effect to changing the REFIO voltage is that the full-scale
voltage in the AUXDAC also changes by the same magnitude.
The register uses twos complement format, in which 011111
maximizes the voltage on the REFIO node and 100000 minimizes
the voltage.
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0
8
16
24
32
40
48
56
CODE
Figure 83. Typical VREF Voltage vs. Code
Option 2
While utilizing the internal FSADJx resistors, each main DAC
can achieve independently controlled coarse gain using the
lower six bits of Register 0x04 (IRSET[5:0]) and Register 0x07
(QRSET[5:0]). Unlike Coarse Gain Option 1, this impacts only
the main DAC full-scale output current. The register uses twos
complement format and allows the output current to be changed
in approximately 0.25 dB steps.
22
20
18
16
VOUT_Q OR VOUT_I
14
12
10
8
6
4
2
0
10
20
30
40
50
60
RSET CODE
Figure 84. Effect of RSET Code
AD9114/AD9115/AD9116/AD9117
Option 3
Even when the device is in pin mode, full-scale values can be
adjusted by sourcing or sinking current from the FSADJ pins.
Any noise injected here appears as amplitude modulation of the
output. Thus, a portion of the required series resistance (at least
20 kΩ) must be installed right at the pin. A range of ±10% is
quite practical using this method.
Option 4
As in Option 3, when the device is in pin mode both full-scale
values can be adjusted by sourcing or sinking current from the
REFIO pin. Noise injected here appears as amplitude modulation
of the output, so a portion of the required series resistance (at
least 10 kΩ) must be installed at the pin. A range of ±25% is
quite practical when using this method.
Fine Gain
Each main DAC has independent fine gain control using the
lower six bits in Register 0x03 (I DAC gain) and Register 0x06
(Q DAC gain). Unlike Coarse Gain Option 1, this impacts only
the main DAC full-scale output current. This register uses straight
binary format. One application where straight binary format is
critical is for side-band suppression while using a quadrature
modulator. This is described in more detail in the Applications
Information section.
11.10
11.00
3.3V DAC1
3.3V DAC2
1.8V DAC1
1.8V DAC2
10.90
10.80
10.70
10.60
10.50
0
8
16
24
32
40
48
56 64
GAIN DAC CODE
Figure 85. Typical DAC Gain Characteristics
Rev. 0 | Page 41 of 48
 

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