datasheetbank_Logo     Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD9114 View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
AD9114 Dual, 8-/10-/12-/14-Bit Low Power Digital-to-Analog Converters ADI
Analog Devices ADI
AD9114 Datasheet PDF : 48 Pages
First Prev 31 32 33 34 35 36 37 38 39 40 Next Last
AD9114/AD9115/AD9116/AD9117
Register
Cal Control
Cal Memory
Memory
Address
Memory
Data
Memory
R/W
CLKMODE
Version
Address Bit Name
0x0E
7 PRELDQ
6 PRELDI
5 CALSELQ
4 CALSELI
3 CALCLK
2:0 DIVSEL[2:0]
0x0F
7 CALSTATQ
6 CALSTATI
3:2 CALMEMQ[1:0]
1:0 CALMEMI[1:0]
0x10
0x11
0x12
0x14
5:0 MEMADDR[5:0]
5:0 MEMDATA[5:0]
7 CALRSTQ
6 CALRSTI
4 CALEN
3 SMEMWR
2 SMEMRD
1 UNCALQ
0 UNCALI
7:6 CLKMODEQ[1:0]
4 Searching
3 Reacquire
2 CLKMODEN
0x1F
1:0 CLKMODEI[1:0]
7:0 VERSION[7:0]
Function
0: Preload Q DAC calibration reference set to 32
1: Preload Q DAC calibration reference set by user (Cal Address 1)
0: Preload I DAC calibration reference set to 32
1: Preload I DAC calibration reference set by user (Cal Address 1)
1: Select Q DAC self-calibration
1: Select I DAC self-calibration
1: Calibration clock enabled
Calibration clock divide ratio from DAC clock rate
000 = divide by 256; 001 = divide by 128 … 110 = divide by 4; 111= divide by 2
1: Calibration of Q DAC complete
1: Calibration of I DAC complete
Status of Q DAC calibration memory
00: Uncalibrated
01: Self-calibrated
10: User calibrated
Status of I DAC calibration memory
00: Uncalibrated
01: Self-calibrated
10: User calibrated
Address of static memory to be accessed
Data for static memory access
1: Clear CALSTATQ
1: Clear CALSTATI
1: Initiate device self-calibration
1: Write to static memory (calibration coefficients)
1: Read from static memory (calibration coefficients)
1: Reset Q DAC calibration coefficients to default (uncalibrated)
1: Reset I DAC calibration coefficients to default (uncalibrated)
Q datapath retimer clock select output (that is, readback after Q retimer acquires)
High indicates internal data path retimer is searching for clock relationship (device
output is not usable while this bit is high)
Edge triggered, 0 to 1 causes the retimer to reacquire the clock relationship
0: CLKMODEI/Q values computed by the two retimers and read back in CLKMODEI[1:0]
and CLKMODEQ[1:0]
1: CLKMODE values set in CLKMODEI[1:0] override both I and Q retimers
0: CLKMODEN, read only; clock phase chosen by retimer
1: CLKMODEN, read/write; value in this register sets I and Q clock phases
Hardware version of the device
Rev. 0 | Page 36 of 48
Direct download click here

 

Share Link : 

All Rights Reserved © datasheetbank.com 2014 - 2020 [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]