Data Sheet
AD9106
REGISTER DESCRIPTIONS
SPI Control Register (SPICONFIG, Address 0x00)
Table 15. Bit Descriptions for SPICONFIG
Bits Bit Field Name Settings Description
15
LSBFIRST
LSB first selection.
0
MSB first per SPI standard (default).
1
LSB first per SPI standard.
14
SPI3WIRE
Selects if SPI is using 3-wire or 4-wire interface.
0
4-wire SPI.
1
3-wire SPI.
13
RESET
Executes software reset of SPI and controllers, reloads default register
values, except for Register 0x00.
0
Normal status.
1
Resets whole register map, except for Register 0x00.
12
DOUBLESPI
Double SPI data line.
0
The SPI port has only 1 data line and can be used as a 3-wire or 4-wire
interface.
1
The SPI port has 2 data lines: both bidirectional defining a pseudo dual
3-wire interface where CSE and SCLK are shared between the two ports.
A
A
This mode is only available for RAM data read or write.
11
SPI_DRV
Double-drive ability for SPI output.
0
Single SPI output drive ability.
1
Two-time drive ability on SPI output.
10
DOUT_EN
0
1
Enables DOUT signal on SDO/SDI2/DOUT pin.
SDO/SDI2 function input/output.
DOUT function output.
[9:6] RESERVED
5
DOUT_ENM1
0F
Enable DOUT signal on SDO/SDI2/DOUT pin.
4
SPI_DRVM1
Double-drive ability for SPI output.
3
DOUBLESPIM1
Double SPI data line.
2
RESETM1
Executes software reset of SPI and controllers, reloads default register
values, except for Register 0x00.
1
SPI3WIREM1
Selects if SPI is using 3-wire or 4-wire interface.
0
LSBFIRSTM1
LSB first selection.
Reset
0
Access
RWE
A
0
RWE
A
0
RWE
A
0
RWE
A
0
RWE
A
0
RWE
A
RWE
A
RWE
A
0
RWE
A
0
RWE
A
0
RWE
A
0
RW
0
RWE
A
1 SPICONFIG[10:15] should always be set to the mirror of SPICONFIG[5:0] to allow easy recovery of the SPI operation when the LSBFIRST bit is set incorrectly. Bit[15] =
Bit[0], Bit[14] = Bit[1], Bit[13] = Bit[2], Bit[12] = Bit[3], Bit[11] = Bit[4] and Bit[10] = Bit[5].
Rev. A | Page 33 of 48