AD9106BCPZ View Datasheet(PDF) - Analog Devices
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Description
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AD9106BCPZ
Analog Devices
AD9106BCPZ Datasheet PDF : 48 Pages
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AD9106
Data Sheet
REGISTER MAP
Table 14. Register Summary
Addr Register
(Hex) Name
Bits Bit 7
Bit 6
0x00 SPICONFIG
[15:8] LSBFIRST
SPI3WIRE
[7:0]
RESERVED[1:0]
Bit 5
RESET
DOUT_ENM
Bit 4
DOUBLESPI
SPI_DRVM
Bit 3
SPI_DRV
DOUBLESPIM
Bit 2
DOUT_EN
RESETM
Bit 1
Bit 0
RESERVED[3:2]
SPI3WIREM
LSBFIRSTM
0x01 POWERCONFIG [15:8]
RESERVED
[7:0] PDN_LDO_DIG1 PDN_LDO_DIG2 REF_PDN
REF_EXT
CLK_LDO_STAT DIG1_LDO_STAT DIG2_LDO_STAT PDN_LDO_CLK
DAC1_SLEEP
DAC2_SLEEP
DAC3_SLEEP
DAC4_SLEEP
0x02 CLOCKCONFIG [15:8]
RESERVED[15:12]
[7:0] DIS_DCLK
CLK_SLEEP
CLK_PDN
EPS
DIS_CLK1
DAC1_INV_CLK
DIS_CLK2
DAC2_INV_CLK
DIS_CLK3
DIS_CLK4
DAC3_INV_CLK DAC4_INV_CLK
0x03 REFADJ
[15:8]
[7:0]
RESERVED[1:0]
RESERVED[9:2]
BGDR
0x04 DAC4AGAIN
[15:8] RESERVED
[7:0] RESERVED
DAC4_GAIN_CAL
DAC4_GAIN
0x05 DAC3AGAIN
[15:8] RESERVED
[7:0] RESERVED
DAC3_GAIN_CAL
DAC3_GAIN
0x06 DAC2AGAIN
[15:8] RESERVED
[7:0] RESERVED
DAC2_GAIN_CAL
DAC2_GAIN
0x07 DAC1AGAIN
[15:8] RESERVED
[7:0] RESERVED
DAC1_GAIN_CAL
DAC1_GAIN
0x08 DACxRANGE
[15:8]
[7:0]
DAC4_GAIN_RNG
DAC3_GAIN_RNG
RESERVED
DAC2_GAIN_RNG
DAC1_GAIN_RNG
0x09 DAC4RSET
[15:8] DAC4_RSET_EN
[7:0]
RESERVED
RESERVED
DAC4_RSET_CAL
DAC4_RSET
0x0A DAC3RSET
[15:8] DAC3_RSET_EN
[7:0]
RESERVED
RESERVED
DAC3_RSET_CAL
DAC3_RSET
0x0B DAC2RSET
[15:8] DAC2_RSET_EN
[7:0]
RESERVED
RESERVED
DAC2_RSET_CAL
DAC2_RSET
0x0C DAC1RSET
[15:8] DAC1_RSET_EN
[7:0]
RESERVED
RESERVED
DAC1_RSET_CAL
DAC1_RSET
0x0D CALCONFIG
[15:8] RESERVED
[7:0] CAL_MODE
COMP_OFFSET
_OF
CAL_MODE_EN
COMP_OFFSET RSET_CAL_OF
_UF
COMP_CAL_RNG
RSET_CAL_UF
CAL_CLK_EN
GAIN_CAL_OF
GAIN_CAL_UF CAL_RESET
CAL_CLK_DIV
0x0E COMPOFFSET [15:8] RESERVED
[7:0]
RESERVED
COMP_OFFSET_CAL
CAL_FIN
START_CAL
0x1D RAMUPDATE
[15:8]
[7:0]
RESERVED[14:7]
RESERVED[6:0]
RAMUPDATE
0x1E PAT_STATUS
[15:8]
[7:0]
RESERVED[3:0]
RESERVED[12:5]
BUF_READ
MEM_ACCESS
PATTERN
RUN
0x1F PAT_TYPE
[15:8]
[7:0]
RESERVED[14:7]
RESERVED[6:0]
PATTERN_RPT
0x20 PATTERN_DLY [15:8]
[7:0]
PATTERN_DELAY[15:8]
PATTERN_DELAY[7:0]
0x22 DAC4DOF
[15:8]
[7:0]
DAC4_DIG_OFFSET[3:0]
DAC4_DIG_OFFSET[11:4]
RESERVED
0x23 DAC3DOF
[15:8]
[7:0]
DAC3_DIG_OFFSET[3:0]
DAC3_DIG_OFFSET[11:4]
RESERVED
0x24 DAC2DOF
[15:8]
[7:0]
DAC2_DIG_OFFSET[3:0]
DAC2_DIG_OFFSET[11:4]
RESERVED
0x25 DAC1DOF
[15:8]
[7:0]
DAC1_DIG_OFFSET[3:0]
DAC1_DIG_OFFSET[11:4]
RESERVED
0x26 WAV4_3CONFIG [15:8]
[7:0]
RESERVED
RESERVED
PRESTORE_SEL4
PRESTORE_SEL3
RESERVED
RESERVED
WAVE_SEL4
WAVE_SEL3
0x27 WAV2_1CONFIG [15:8]
[7:0]
RESERVED
RESERVED
PRESTORE_SEL2
PRESTORE_SEL1
MASK_DAC4
MASK_DAC3
CH2_ADD
CH1_ADD
WAVE_SEL2
WAVE_SEL1
Rev. A | Page 30 of 48
Reset RWE
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x
RWE
A
000A
0x
RWE
A
000A
0x
RWE
A
000A
0x
RWE
A
000A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x
RWE
A
000E
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0x00 RWE
A
0000 RWE
A
0x00 RWE
A
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