datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD9102 View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
AD9102 Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9102
ABSOLUTE MAXIMUM RATINGS
Table 9.
Parameter
AVDD1, AVDD2, DVDD to AGND, DGND,
CLKGND
CLKVDD to AGND, DGND, CLKGND
CLDO, DLDO1, DLDO2 to AGND, DGND,
CLKGND
AGND to DGND, CLKGND
DGND to AGND, CLKGND
CLKGND to AGND, DGND
CS, SDIO, SCLK, SDO/
SDI2/DOUT, RESET, TRIGGER to
DGND
CLKP, CLKN to CLKGND
REFIO to AGND
IOUTP, IOUTN to AGND
FSADJ, CAL_SENSE to AGND
Junction Temperature
Storage Temperature Range
Rating
−0.3 V to +3.9 V
−0.3 V to +3.9 V
−0.3 V to 2.2 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−0.3 V to DVDD + 0.3 V
−0.3 V to CLKVDD + 0.3 V
−1.0 V to AVDD + 0.3 V
−0.3 V to DVDD + 0.3 V
−0.3 V to AVDD + 0.3 V
125°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Data Sheet
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a standard circuit board for surface-mount
packages. θJC is measured from the solder side (bottom) of the
package.
Table 10. Thermal Resistance
Package Type
θJA
θJB
θJC
Unit
32-Lead LFCSP with Exposed 30.18 6.59 3.84 °C/W
Paddle
ESD CAUTION
Rev. 0 | Page 8 of 36
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]