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AD9002SD View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
AD9002SD Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
AD9002
Pin #
1
2
Name
DIGITAL GROUND
OVERFLOW INH
FUNCTIONAL DESCRIPTION
Description
One of four digital ground pins. All digital ground pins should be connected together.
OVERFLOW INHIBIT controls the data output polarity for overvoltage inputs.
3
4
5
6
7
8
9
10
11
12
13
14
15
16–19
20
21, 22
23
24, 25
26
27
28
HYSTERESIS
+VREF
ANALOG INPUT
ANALOG GROUND
ENCODE
ENCODE
ANALOG GROUND
ANALOG INPUT
–VREF
REFMID
DIGITAL GROUND
DIGITAL –VS
D1 (LSB)
D2–D5
DIGITAL GROUND
ANALOG –VS
DIGITAL GROUND
D6, D7
D8 (MSB)
OVERFLOW
DIGITAL –VS
DIP
Analog Input
Overflow Enabled
(Floating or –5.2 V)
of D1–D8
Overflow Inhibited (GND)
of D1–D8
VIN > +VREF
VIN +VREF
10 0 0 0 0 0 0 0
0XXXXX XXX
01 1 1 1 1 1 1 1
0XXXX XX XX
The Hysteresis control voltage varies the comparator hysteresis from 0 mV to 10 mV, for a change
from –5.2 V to –2.2 V at the Hysteresis control pin. Normally converted to –5.2 V.
The most positive reference voltage for the internal resistor ladder.
One of two analog input pins. Both analog input pins should be connected together.
One of two analog ground pins. Both analog ground pins should be connected together.
Noninverted input of the differential encode input. This pin is driven in conjunction with
ENCODE. Data is latched on the rising edge of the ENCODE signal.
Inverted input of the differential encode input. This pin is driven in conjunction with ENCODE.
One of two analog ground pins. Both analog ground pins should be connected together.
One of two analog input pins. Both analog inputs should be connected together.
The most negative reference voltage for the internal resistor ladder.
The midpoint tap on the internal resistor ladder.
One of four digital ground pins. All digital ground pins should be connected together.
One of two negative digital supply pins (nominally –5.2 V). Both digital supply pins should be con-
nected together.
Digital data output.
Digital data output.
One of four digital ground pins. All digital ground pins should be connected together.
One of two negative analog supply pins (nominally –5.2 V). Both analog supply pins should be con-
nected together.
One of four digital ground pins. All digital ground pins should be connected together.
Digital data output.
Digital data output.
Overflow data output. Logic high indicates an input overvoltage (VIN > +VREF) if OVERFLOW
INHIBIT is enabled (overflow enabled, –5.2 V). See OVERFLOW INHIBIT.
One of two negative digital supply pins (nominally –5.2 V). Both digital supply pins should be
connected together.
PIN DESIGNATIONS
LCC
JLCC
DIGITAL
GROUND
1
OVERFLOW INH 2
28 DIGITAL –VS
27 OVERFLOW
HYSTERESIS 3
26 D8(MSB)
+VREF 4
25 D7
ANALOG INPUT 5
24 D6
ANALOG 6
GROUND
AD9002
23 DIGITAL
GROUND
ENCODE 7 TOP VIEW 22 ANALOG –VS
ENCODE 8 (Not to Scale) 21 ANALOG –VS
ANALOG
GROUND
9
20
DIGITAL
GROUND
ANALOG INPUT 10
19 D5
–VREF 11
REFMID 12
DIGITAL
GROUND
13
DIGITAL –VS 14
18 D4
17 D3
16 D2
15 D1(LSB)
4 3 2 1 28 27 26
ANALOG INPUT 5
ANALOG 6
GROUND
ENCODE 7
ENCODE 8
ANALOG
GROUND
9
ANALOG INPUT 10
–VREF 11
AD9002
TOP VIEW
(Not to Scale)
12 13 14 15 16 17 18
25 24 23 22 21 20 19
25 D7
24 D6
23
DIGITAL
GROUND
22 ANALOG –VS
21 ANALOG –VS
20
DIGITAL
GROUND
19 D 5
D8(MSB) 26
OVERFLOW 27
DIGITAL –VS 28
DIGITAL
GROUND
1
OVERFLOW INH 2
HYSTERESIS 3
+VREF 4
AD9002
TTOOPPVVIIEW
(N(Noot tttoo SSccale))
18 D4
17 D3
16 D2
15 D1(LSB)
14 DIGITAL –VS
13
DIGITAL
GROUND
12 REFMID
5 6 7 8 9 10 11
–4–
REV. D
 

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